ds18b20 數(shù)字溫度計外文資料翻譯

1、<p>　　畢業(yè)設(shè)計(論文)外文資料翻譯</p><p>　　注：請將該封面與附件裝訂成冊。附件1：外文資料翻譯譯文</p><p><b>　　DS18B20</b></p><p><b>　　描述：</b></p><p>　　DS18B20 數(shù)字溫度計提供9至12位溫度讀數(shù)，指示器

2、件的溫度。</p><p>　　信息經(jīng)過單線接口送入DS18B20或送出，因此從中央處理器到DS18B20僅需連接一條（和地）。讀、寫和完成溫度變換所需的電源可以有數(shù)據(jù)線本身提供，而不需要外部電源。</p><p>　　因為每一個DS18B20有唯一的系列號，因此多個DS18B20可以存在于同一條單線總線上。這允許在許多不同的地方放置溫度靈敏器件。此特性的應(yīng)用范圍包括HVAC環(huán)境控制，建筑

3、物、設(shè)備或機械內(nèi)的溫度檢測，以及過程監(jiān)視和控制中的溫度檢測。</p><p><b>　　特性：</b></p><p>　　獨特的單線接口，只需一個接口引腳即可通信。</p><p>　　多點能力使分布式溫度檢測應(yīng)用得以簡化。</p><p><b>　　不需要外部元件。</b></p>

4、;<p>　　可用數(shù)據(jù)線供電，提供3.0V到5.5V的電源。</p><p><b>　　不需備份電源。</b></p><p>　　測量范圍從-55°C 到+125°C，等效的華氏溫標范圍是-67°F 到+257°F</p><p>　　以9到12位數(shù)字值方式讀出溫度。</p>

5、<p>　　在750毫秒內(nèi)把12位溫度變換為數(shù)字。</p><p>　　用戶可定義的，非易失性的溫度警告設(shè)置。</p><p>　　告警搜索命令識別和尋址溫度在編定的極限之外的器件（溫度告警情況）。</p><p>　　應(yīng)用范圍包括恒溫控制，工業(yè)系統(tǒng)，消費類產(chǎn)品，溫度計或任何熱敏系統(tǒng)。</p><p><b>　　引腳

6、排列</b></p><p><b>　　引腳說明</b></p><p><b>　　GND – 地</b></p><p>　　DQ – 數(shù)字輸入輸出</p><p>　　VDD – 可選的VDD</p><p><b>　　NC – 不連接&

7、lt;/b></p><p><b>　　詳細引腳說明</b></p><p><b>　　綜述</b></p><p>　　圖1的方框圖表示DS18B20的主要部件。DS18B20有三個主要的數(shù)據(jù)部件：1）64為激光ROM，2）溫度靈敏元件，3）非易失性溫度告警觸發(fā)器TH和TL。器件從單線的通信線取得其電源，在信號

8、線為高電平的時間周期內(nèi)，把能量貯存在內(nèi)部的電容器中，在單信號線為低電平的時間期內(nèi)斷開此電源，直到信號線變?yōu)楦唠娖街匦陆由霞纳娙荩╇娫礊橹?，作為另一種可供選擇的方法，DS18B20也用外部5V電源供電。</p><p>　　與DS18B20的通信經(jīng)過一個單線接口。在單線接口情況下，在ROM操作未定建立之前不能使用存貯器和控制操作。主機必須首先提供五種ROM操作命令之一：1）讀ROM，2）符合ROM，3）搜索RO

9、M,4)跳過ROM，5)告警搜索。這些命令對每一個器件的64位激光ROM部分進行操作。如果在單線上有許多器件，那么可以挑選出一個特定的器件，并給總線上的主機指示存在多少器件及其類型。在成功地執(zhí)行了ROM操作序列之后，可使用貯存2器和控制操作。然后主機可以提供六種存貯器和操作命令之一。</p><p>　　一個操作命令指示DS18B20完成溫度測量。改測量的結(jié)果放入DS18B20的高速暫存存貯器，通過發(fā)出讀暫存存儲

10、器內(nèi)容的存儲器操作命令可以讀出此結(jié)果。每一溫度告警觸發(fā)器TH和TL構(gòu)成一個字節(jié)的EPROM。如果不對DS18B20施加告警搜索命令，這些寄存器用作通用用戶存儲器。使用存儲器操作命令可以寫TH和TL。對這些寄存器的讀訪問通過便簮存儲器。所以數(shù)據(jù)均以最低有效位在前的方式被讀寫。</p><p><b>　　單線總線系統(tǒng)</b></p><p>　　單線總線是一種具有一個總

11、線主機和一個或若干個從機的系統(tǒng)。DS18B20起從機的作用。這種總線系統(tǒng)的討論分為三個題目:硬件接法，處理順序，以及單線信號（信號類型與定時）。</p><p><b>　　硬件接法</b></p><p>　　根據(jù)定義，單線總線只有一根線：這一點很重要的，即線上的第一個器件能在適當?shù)臅r間驅(qū)動該總線。為了做到這一點第一個連接到總線上的器件必須具有漏極開路或三態(tài)輸出。D

12、S18B20的單線接口。多站總線由單線總線和多個與之相連的從屬器件組成。單線總線要求近似等于5 k?.</p><p>　　單線總線的空閑狀態(tài)是高電平。不管任何原因，如果執(zhí)行需要被掛起，那么，若要重新恢復(fù)執(zhí)行，總線必須保持在空閑狀態(tài)。如果不滿足這一點且總線保持在低電平時間大于480微秒，那么總線上所有的器件均被復(fù)位。</p><p><b>　　硬件連接圖</b>&l

13、t;/p><p><b>　　處理順序</b></p><p>　　經(jīng)過單線總線接口訪問DS18B20的協(xié)議如下：</p><p><b>　　初始化</b></p><p><b>　　ROM操作命令</b></p><p><b>　　存貯器操

14、作命令</b></p><p><b>　　處理/數(shù)據(jù)</b></p><p><b>　　初始化</b></p><p>　　單線總線上的所有處理均從初始化序列開始。初始化序列包括總線主機發(fā)出一復(fù)位脈沖，接著由從屬器件送出存在脈沖。</p><p><b>　　ROM操作命令

15、</b></p><p>　　一旦總線主機檢測到從屬器件的存在，他便可以發(fā)出器件ROM操作命令之一。所有ROM操作命令均由8位長，這些命令列表如下：</p><p>　　讀ROM [33H]</p><p>　　此命令允許總線主機讀DS18B20的8位產(chǎn)品系列編碼，唯一的48位序列號，以及8位的CRC。此命令只能在總線上僅有一個DS18B20得情況下可

16、以使用。如果總線上存在多于一個得從屬器件，那么所有從片企圖同時發(fā)送時將發(fā)生數(shù)據(jù)沖突的現(xiàn)象。</p><p>　　符合ROM [55h]</p><p>　　符合ROM命令。后繼以64位的ROM數(shù)據(jù)序列，允許總線主機對多點總線上的DS18B20尋址。只有與64位ROM序列嚴格相符的DS18B20才能對后繼的存貯器操作命令作出響應(yīng)。所有與64位ROM序列不符的從片將等待復(fù)位脈沖。此命令在總線數(shù)

17、據(jù)上有單個或多個器件的情況下均可使用。</p><p>　　跳過ROM[CCh]</p><p>　　在單點總線系統(tǒng)中，此命令通過允許總線主機不提供64位ROM編碼而訪問存儲器操作來節(jié)省時間。如果在總線上存在多于一個得從屬器件而且在跳過ROM命令之后發(fā)出讀命令，那么由于多個從片同時發(fā)送數(shù)據(jù)，會在總線上發(fā)生數(shù)據(jù)沖突</p><p>　　搜索ROM[F0h]</p

18、><p>　　當系統(tǒng)開始工作時，總線主機可能不知道單線總線上的器件個數(shù)或者不知道其64位ROM編碼。搜索ROM命令允許總線主機使用一種消去處理來識別總線上的所有從片的64位ROM編碼。</p><p>　　5.告警搜索[ECh]</p><p>　　此命令的流程與搜索ROM命令相同。但是，僅在最近一次溫度測量出現(xiàn)告警的情況下，DS18B20才對此命令作出響應(yīng)。告警的條件

19、定義為溫度高于TH或低于TL。只要DS18B20一上電，告警條件就保持在設(shè)置狀態(tài)，直到另一次溫度測量告警。</p><p><b>　　6.ROM搜索舉例</b></p><p>　　ROM搜索過程是簡單三步過程的重復(fù)：讀一位，讀核位的補碼，然后寫所需的那一位的值?？偩€主機在ROM的每一位上完成這一簡單的三步過程。在全部過程完成之后，總線主機便知道一個器件中ROM的內(nèi)

20、容，器件中其余的數(shù)以及他們的ROM編碼可以游另外一個過程來識別。</p><p>　　以下ROM搜索過程的例子假設(shè)四個不同的器件連接到同一條單線總線上。四個器件的ROM數(shù)據(jù)如下所示：</p><p>　　ROM1 00110101…</p><p>　　ROM2 10101010…</p><p>　　ROM3 11110101…</p

21、><p>　　ROM4 00010001…</p><p><b>　　搜索過程如下：</b></p><p>　　1.總線主機通過發(fā)出復(fù)位脈沖開始初始化序列，從屬器件通過發(fā)出同時的存在脈沖作出響應(yīng)。</p><p>　　2.然后總線主機在單線總線上發(fā)出搜索人ROM命令。</p><p>　　3.總線

22、主機從單線過程中讀一位。每一器件通過把他們各自ROM數(shù)據(jù)的第一位的值放到單線總線上來作出響應(yīng)。ROM1和ROM4:將把一個0放在單線總線上，即，把它拉至低電平。ROM2和3通過使總線停留在高電平而把1放在單線總線上。結(jié)果是線上所有器件的邏輯與，因此總線主機接收到一個0.總線主機讀另一位。因此搜索ROM數(shù)據(jù)命令正在執(zhí)行，所以單線總線上所有器件通過把各自ROM數(shù)據(jù)第一位的補碼放到單線總線上來對這第二個讀作出響應(yīng)。ROM1和ROM2把1放在單

23、總線上，使之處于高電平。ROM2和ROM3把0放在單線上，因此他將被拉至低電平。對于第一個ROM數(shù)據(jù)位的補碼總線主機觀察到得仍是一個0.總線主機便可決定單線總線上有一些第一位為0的器件和一些第一位為1的器件。</p><p>　　4.總線主機寫一個0.在這次搜索過程的其余部分，將不選擇ROM2和ROM3，僅留下連接到單線總線的ROM1和ROM4。</p><p>　　5.總線主機再執(zhí)行兩次

24、讀，并在一個1位之后接收到一個0位，這表示所有還連接在總線上的器件的第二個ROM數(shù)據(jù)位為0.</p><p>　　6.總線主機接著寫一個0，使ROM1和ROM4二者保持連接。</p><p>　　7.總線主機執(zhí)行兩次連讀，并接收到兩次0數(shù)據(jù)位。這表示連接著的器件ROM數(shù)據(jù)的第三位都是1數(shù)據(jù)位和0數(shù)據(jù)位。</p><p>　　8.總線主機寫一個數(shù)據(jù)位。這將不選擇ROM

25、1而把ROM4作為唯一仍連接著的器件加以保留。</p><p>　　9.總線主機讀ROM4的ROM數(shù)據(jù)位的剩余部分，而且訪問需要的部件。這就完成了第一個過程并且唯一的識別單線總線上的部件。</p><p>　　10.總線主機通過重復(fù)步驟1至7開始一個新的ROM搜索序列。</p><p>　　11.總線主機寫一個1，這將不與ROM4發(fā)生聯(lián)系，而唯一的與ROM1仍保持著

26、聯(lián)系。</p><p>　　12.總線主機對于ROM1讀出ROM位的剩余部分而且，如果需要的話，與內(nèi)部邏輯通信。這就完成了第二個ROM搜索過程，在其中ROM中的另一個被找到。</p><p>　　13.總線主機通過重復(fù)步驟1至3開始一次新的ROM搜索。</p><p><b>　　注意下述內(nèi)容：</b></p><p>

27、　　在第一次ROM搜索過程中，總線主機知道一個單線器件的唯一的ID號。取得部件唯一ROM編碼的時間為：</p><p>　　960us+(8+3×64)us=13.16ms</p><p>　　因此總線主機每秒鐘能夠識別75個不同的單線器件。</p><p>　　附件2：外文原文（復(fù)印件）</p><p><b>　　DS

28、18B20</b></p><p>　　DESCRIPTION</p><p>　　The DS18B20 Digital Thermometer provides 9 to 12-bit (configurable) temperature readings which indicate the temperature of the device.</p>&l

29、t;p>　　Information is sent to/from the DS18B20 over a 1-Wire interface, so that only one wire (and ground) needs to be connected from a central microprocessor to a DS18B20. Power for reading, writing, and performing te

30、mperature conversions can be derived from the data line itself with no need for an external power source.</p><p>　　Because each DS18B20 contains a unique silicon serial number, multiple DS18B20s can exist on

31、 the same 1-Wire bus. This allows for placing temperature sensors in many different places. Applications where this feature is useful include HVAC environmental controls, sensing temperatures inside buildings, equipment

32、or machinery, and process monitoring and control.</p><p><b>　　FEATURES</b></p><p>　　Unique 1-Wire interface requires only one port pin for communication</p><p>　　Multidr

33、op capability simplifies distributed temperature sensing applications</p><p>　　Requires no external components</p><p>　　Can be powered from data line. Power supply range is 3.0V to 5.5V</p>

34、;<p>　　Zero standby power required</p><p>　　Measures temperatures from -55°C to+125°C. Fahrenheit equivalent is -67°F to</p><p><b>　　+257°F</b></p>

35、<p>　　Thermometer resolution is programmable from 9 to 12 bits</p><p>　　Converts 12-bit temperature to digital word in 750 ms (max.)</p><p>　　User-definable, nonvolatile temperature alarm s

36、ettings</p><p>　　Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition)</p><p>　　Applications include thermostatic

37、controls, industrial systems, consumer products,thermometers, or any thermally sensitivesystem.</p><p>　　PIN ASSIGNMENT</p><p>　　PIN DESCRIPTION</p><p>　　GND - Ground</p><

38、;p>　　DQ - Data In/Out</p><p>　　VDD - Power Supply Voltage</p><p>　　NC - No Connect</p><p>　　DETAILED PIN DESCRIPTION </p><p><b>　　OVERVIEW</b></p>

39、<p>　　The block diagram of Figure 1 shows the major components of the DS18B20. The DS18B20 has four main data components: 1) 64-bit lasered ROM, 2) temperature sensor, 3) nonvolatile temperature alarm triggers TH a

40、nd TL. The device derives its power from the 1-Wire communication line by storing energy on an internal capacitor during periods of time when the signal line is high and continues to operate off this power source during

41、the low times of the 1-Wire line until it returns high to replenish the </p><p>　　DS18B20 BLOCK DIAGRAM Figure 1</p><p>　　Communication to the DS18B20 is via a 1-Wire port. With the 1-Wire port,

42、 the memory and control functions will not be available before the ROM function protocol has been established. The master must first provide one of five ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4)

43、 Skip ROM, or 5) Alarm Search. These commands operate on the 64-bit lasered ROM portion of each</p><p>　　device and can single out a specific device if many are present on the 1-Wire line as well as indicate

44、 to the bus master how many and what types of devices are present. After a ROM function sequence has been successfully executed, the memory and control functions are accessible and the master may then provide any one of

45、the six memory and control function commands.</p><p>　　One control function command instructs the DS18B20 to perform a temperature measurement. The result of this measurement will be placed in the DS18B20’s

46、scratch-pad memory, and may be read by issuing a memory function command which reads the contents of the scratchpad memory. The temperature alarm triggers TH and TL consist of 1 byte EEPROM each. If the alarm search comm

47、and is not applied to the DS18B20, these registers may be used as general purpose user memory. The scratchpad also contains a co</p><p>　　1-WIRE BUS SYSTEM</p><p>　　The 1-Wire bus is a system wh

48、ich has a single bus master and one or more slaves. The DS18B20 behaves as a slave. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (

49、signal types and timing).</p><p>　　HARDWARE CONFIGURATION</p><p>　　The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the app

50、ropriate time. To facilitate this, each device attached to the 1-Wire bus must have open drain or 3-state outputs. The 1-Wire port of the DS18B20 (DQ pin) is open drain with an internal circuit equivalent to that shown i

51、n Figure 9. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus requires a pullup resistor of approximately 5 k?.</p><p>　　The idle state for the 1-Wire bus is high. If for

52、 any reason a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1-Wire bus is in the inactive (high)

53、state during the recovery period. If this does not occur and the bus is left low for more than 480 s, all components on the bus will be reset.</p><p>　　HARDWARE CONFIGURATION </p><p>　　TRANSACTI

54、ON SEQUENCE</p><p>　　The protocol for accessing the DS18B20 via the 1-Wire port is as follows:</p><p>　　_ Initialization</p><p>　　_ ROM Function Command</p><p>　　_ Memo

55、ry Function Command</p><p>　　_ Transaction/Data</p><p>　　INITIALIZATION</p><p>　　All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequenc

56、e consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS18B20 is on the bus and is ready to operate. For

57、 more details, see the “1-Wire Signaling” section.</p><p>　　ROM FUNCTION COMMANDS</p><p>　　Once the bus master has detected a presence, it can issue one of the five ROM function commands. All RO

58、M function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure 5)</p><p>　　Read ROM [33h]</p><p>　　This command allows the bus master to read the DS18B20’s 8

59、-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single DS18B20 on the bus. If more than one slave is present on the bus, a data collision will occur when all slav

60、es try to transmit at the same time (open drain will produce a wired AND result).</p><p>　　Match ROM [55h]</p><p>　　The match ROM command, followed by a 64-bit ROM sequence, allows the bus maste

61、r to address a specific DS18B20 on a multidrop bus. Only the DS18B20 that exactly matches the 64-bit ROM sequence will respond to the following memory function command. All slaves that do not match the 64-bit ROM sequenc

62、e will wait for a reset pulse. This command can be used with a single or multiple devices on the</p><p><b>　　bus.</b></p><p>　　Skip ROM [CCh]</p><p>　　This command can s

63、ave time in a single drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus and a Read command is issued following th

64、e Skip ROM command, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain pulldowns will produce a wired AND result).</p><p>　　Search ROM [F0h]</p><p>　　Whe

65、n a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process of elimination to identif

66、y the 64-bit ROM codes of all slave devices on the bus.</p><p>　　Alarm Search [ECh]</p><p>　　The flowchart of this command is identical to the Search ROM command. However, the DS18B20 will respo

67、nd to this command only if an alarm condition has been encountered at the last temperature measurement. An alarm condition is defined as a temperature higher than TH or lower than TL. The alarm condition remains set as l

68、ong as the DS18B20 is powered up, or until another temperature measurement reveals a non-alarming value. For alarming, the trigger values stored in EEPROM are taken into account. </p><p>　　Example of a ROM S

69、earch</p><p>　　The ROM search process is the repetition of a simple three-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simp

70、le, three-step routine</p><p>　　on each bit of the ROM. After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identif

71、ied by additional passes.</p><p>　　The following example of the ROM search process assumes four different devices are connected to the same 1-Wire bus. The ROM data of the four devices is as shown:</p>

72、;<p>　　ROM1 00110101...</p><p>　　ROM2 10101010...</p><p>　　ROM3 11110101...</p><p>　　ROM4 00010001...</p><p>　　The search process is as follows:</p><p

73、>　　1. The bus master begins the initialization sequence by issuing a reset pulse. The slave devices respond</p><p>　　by issuing simultaneous presence pulses.</p><p>　　2. The bus master will t

74、hen issue the Search ROM command on the 1-Wire bus.</p><p>　　3. The bus master reads a bit from the 1-Wire bus. Each device will respond by placing the value of the first bit of their respective ROM data ont

75、o the 1-Wire bus. ROM1 and ROM4 will place a 0 onto the 1-Wire bus, i.e., pull it low. ROM2 and ROM3 will place a 1 onto the 1-Wire bus by allowing the line to stay high. The result is the logical AND of all devices on t

76、he line, therefore the bus master sees a 0. The bus master reads another bit. Since the Search ROM data command is being executed,</p><p>　　all of the devices on the 1-Wire bus respond to this second read by

77、 placing the complement of the first bit of their respective ROM data onto the 1-Wire bus. ROM1 and ROM4 will place a 1 onto the 1-Wire, allowing the line to stay high. ROM2 and ROM3 will place a 0 onto the 1-Wire, thus

78、it will be pulled low. The bus master again observes a 0 for the complement of the first ROM data bit. The bus master has determined that there are some devices on the 1-Wire bus that have a 0 in the first positio</p&

79、gt;<p>　　4. The bus master writes a 0. This deselects ROM2 and ROM3 for the remainder of this search pass,</p><p>　　leaving only ROM1 and ROM4 connected to the 1-Wire bus.</p><p>　　5. The

80、 bus master performs two more reads and receives a 0-bit followed by a 1-bit. This indicates that all devices still coupled to the bus have 0s as their second ROM data bit.</p><p>　　6. The bus master then wr

81、ites a 0 to keep both ROM1 and ROM4 coupled.</p><p>　　7. The bus master executes two reads and receives two 0-bits. This indicates that both 1-bits and 0-bits exist as the 3rd bit of the ROM data of the atta

82、ched devices.</p><p>　　8. The bus master writes a 0-bit. This deselects ROM1, leaving ROM4 as the only device still</p><p>　　connected.</p><p>　　9. The bus master reads the remainde

83、r of the ROM bits for ROM4 and continues to access the part if</p><p>　　desired. This completes the first pass and uniquely identifies one part on the 1-Wire bus.</p><p>　　10. The bus master sta

84、rts a new ROM search sequence by repeating steps 1 through 7.</p><p>　　11. The bus master writes a 1-bit. This decouples ROM4, leaving only ROM1 still coupled.</p><p>　　12. The bus master reads

85、the remainder of the ROM bits for ROM1 and communicates to the underlying logic if desired. This completes the second ROM search pass, in which another of the ROMs was found.</p><p>　　13. The bus master star

86、ts a new ROM search by repeating steps 1 through 3.</p><p><b>　　NOTE:</b></p><p>　　The bus master learns the unique ID number (ROM data pattern) of one 1-Wire device on each ROM</

87、p><p>　　Search operation. The time required to derive the part’s unique ROM code is:</p><p>　　960 ?s + (8 + 3 x 64) 61 ?s = 13.16 ms</p><p>　　The bus master is therefore capable of ide