數(shù)字邏輯設(shè)計(jì)及應(yīng)用

1、1,數(shù)字邏輯設(shè)計(jì)及應(yīng)用,任課教師：姜書艷電子科技大學(xué)自動(dòng)化工程學(xué)院（主樓）C2-209 房間 jshuy@uestc.edu.cn http://222.197.165.195/wlxt/course.aspx?courseid=0669,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),2,Well begun is half done.An early bird catc

2、hes the worm.,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),3,志存高遠(yuǎn) 追求卓越 崇尚學(xué)術(shù) 追求真理 彰顯個(gè)性 多樣成才--王亞非,積極改造主觀世界 主動(dòng)適應(yīng)外圍環(huán)境--王志強(qiáng),4,自立：自己依靠自己自己決定自己未來(lái)的發(fā)展方向自律：要有自己管束自己的意識(shí),5,認(rèn)真學(xué)習(xí)專業(yè)知識(shí) 積極參加學(xué)生工作 注重培養(yǎng)思維方式和思考方法 注重培養(yǎng)

3、自己的領(lǐng)導(dǎo)能力專注專業(yè)，全面發(fā)展,6,具有清楚的思維、表達(dá)和寫作能力具有以批評(píng)的方式系統(tǒng)推理的能力具有形成概念和解決問題的能力具有獨(dú)立思考的能力具有敢于創(chuàng)新及獨(dú)立工作的能力具有與他人合作的能力,普林斯頓大學(xué)的本科培養(yǎng)目標(biāo)：,7,具有判斷什么意味著徹底理解某種東西的能力具有辨識(shí)重要的東西與瑣碎的東西、持久的東西與短暫的東西的能力熟悉不同的思維方式具有某領(lǐng)域知識(shí)的深度,普林斯頓大學(xué)的本科培養(yǎng)目標(biāo)：,8,具有觀察不同學(xué)科、文

4、化、理念相關(guān)之處的能力具有一生求學(xué)不止的能力,普林斯頓大學(xué)的本科培養(yǎng)目標(biāo)：,9,研究型大學(xué)本科教育的實(shí)質(zhì)是：教育我們的學(xué)生成為具有好奇心反思和懷疑精神并至少能在一個(gè)知識(shí)領(lǐng)域中進(jìn)行專門和集中學(xué)習(xí)的人,哈佛大學(xué)的教學(xué)理念：,10,不僅學(xué)生從老師那里學(xué)習(xí)而且老師也從學(xué)生那里學(xué)習(xí)在一所研究型大學(xué)研究與教學(xué)有一種辯證的關(guān)系,斯坦福大學(xué),11,課程設(shè)置中講座式為主而小組討論的方式很少這樣影響學(xué)生的收獲,斯坦福大學(xué)校長(zhǎng)約翰&#

5、183;漢尼斯：,12,中國(guó)大學(xué)本科教育缺乏：1.跨學(xué)科的廣度2.對(duì)批判性思維的培養(yǎng),耶魯大學(xué)校長(zhǎng)理查德·萊文：,13,所有對(duì)學(xué)生產(chǎn)生深遠(yuǎn)影響的重要的具體事件有4/5發(fā)生在課外,耶魯大學(xué),14,1.自由教育與應(yīng)試教育的差別2.學(xué)以致知與學(xué)以致用的差別3.求新與求多的差別,中西文化教育的差異：,15,西方文化： 求新、求異、求變中國(guó)文化: 求多不求新

6、 求同不求異 求穩(wěn)不求變,中西文化教育的差異：,16,強(qiáng)調(diào)實(shí)踐應(yīng)用突出系統(tǒng)概念強(qiáng)化軟硬件聯(lián)系注重知識(shí)面的寬度和廣度注重解決實(shí)際問題能力的培養(yǎng),大小班結(jié)合授課,17,注重學(xué)生人文素質(zhì)的培養(yǎng)培養(yǎng)學(xué)生終身學(xué)習(xí)能力倡導(dǎo)個(gè)性發(fā)展,大小班結(jié)合授課,18,以學(xué)生為中心課內(nèi)與課外相結(jié)合科學(xué)與人文相結(jié)合教學(xué)與科研相結(jié)合,大小班結(jié)合授課,19,小團(tuán)隊(duì)的實(shí)驗(yàn)室和研討會(huì)的研究活動(dòng)是重要的教學(xué)模式一切為了學(xué)生的成長(zhǎng)

7、一切從學(xué)生的實(shí)際出發(fā) 一切讓學(xué)生自主選擇、自我負(fù)責(zé),大小班結(jié)合授課,20,理論教學(xué)+實(shí)踐教育+文化育人科學(xué)精神與人文精神融合專業(yè)教育與素質(zhì)教育融合課內(nèi)培養(yǎng)與課外培養(yǎng)融合共性發(fā)展與個(gè)性發(fā)展融合,大小班結(jié)合授課,21,學(xué)生聽課時(shí)應(yīng)精神飽滿，適時(shí)做筆記，不要趴在桌子上或斜坐在座位上。桌面保持適當(dāng)?shù)恼麧?。課堂上應(yīng)與老師進(jìn)行必要的互動(dòng)。,課堂錄像,22,課程簡(jiǎn)介,“數(shù)字邏輯設(shè)計(jì)及應(yīng)用”課程歷來(lái)是我校的重要專業(yè)基礎(chǔ)課程之一，是研究

8、數(shù)字系統(tǒng)設(shè)計(jì)的入門課程。 通過本課程的學(xué)習(xí)，使學(xué)生掌握數(shù)字邏輯電路的基本理論和基本分析設(shè)計(jì)方法，為學(xué)習(xí)后續(xù)課程準(zhǔn)備必要的電路知識(shí)。 本課程在培養(yǎng)學(xué)生嚴(yán)肅認(rèn)真的科學(xué)作風(fēng)和抽象思維能力、分析計(jì)算能力、總結(jié)歸納能力等方面起重要作用。 在本課程中，將介紹數(shù)字邏輯電路的分析設(shè)計(jì)方法和基本的系統(tǒng)設(shè)計(jì)技巧；培養(yǎng)同學(xué)綜合運(yùn)用知識(shí)提出問題、分析、解決問題、評(píng)價(jià)問題的能力和在工程性設(shè)計(jì)方面的基本素養(yǎng)。通過實(shí)驗(yàn)和課程設(shè)計(jì)、課外上機(jī)實(shí)驗(yàn)

9、等的方式，使同學(xué)深入了解和掌握數(shù)字邏輯電路的設(shè)計(jì)分析方法和電路的運(yùn)用過程。,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),23,課程安排：64學(xué)時(shí)教材： 數(shù)字設(shè)計(jì)—原理與實(shí)踐（第4版 影印版） John F. Wakerly 高等教育出版社 2007參考書： 1.數(shù)字邏輯設(shè)計(jì)及應(yīng)用，姜書艷主編，清

10、華大學(xué)出版社，2007 2. 數(shù)字電子技術(shù)基礎(chǔ) （第5版），閻石主編，高等教育出版社，20073. 數(shù)字設(shè)計(jì)—原理與實(shí)踐（第4版），John F. Wakerly，林生 等譯，機(jī)械工業(yè)出版社，20074. 數(shù)字電路與系統(tǒng) （第2版），劉寶琴等編著，清華大學(xué)出版社，20075. 數(shù)字電路邏輯設(shè)計(jì)（第3版），王毓銀主編，高等教育出版社，2006,Digital Logic Design and Application (數(shù)字

11、邏輯設(shè)計(jì)及應(yīng)用),24,相關(guān)學(xué)習(xí)網(wǎng)站：http://222.197.165.195/wlxt/course.aspx?courseid=0669 ：電子科技大學(xué)/互動(dòng)教學(xué)空間/網(wǎng)絡(luò)學(xué)堂/自動(dòng)化工程學(xué)院/數(shù)字邏輯設(shè)計(jì)及應(yīng)用[姜書艷]www.prenhall.com/onekey/:包含教材中的所有圖表、占教材中半數(shù)以上的部分習(xí)題解答www.ddpp.com: 部分習(xí)題解答www.xilinx.com/programs.univ：X

12、ilinx的大學(xué)計(jì)劃，提供了大量的產(chǎn)品資料、課程資料以及用于數(shù)字設(shè)計(jì)實(shí)驗(yàn)課程的芯片和插件www.aldec.com/education/university：Aldec的教育計(jì)劃，提供了Aldec自己的軟件包和第三方的兼容工具以及原型系統(tǒng)。,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),25,內(nèi)容安排：32次課 內(nèi)容講解29次，習(xí)題講解3次第1，2章

13、 3次 引言，數(shù)制與編碼第3章 4次 數(shù)字電路器件基礎(chǔ)第4，6章 11次 組合電路分析與設(shè)計(jì)第5章 1次 Verilog語(yǔ)言第7，8章 11次 時(shí)序電路分析與設(shè)計(jì)第9章 1次 存儲(chǔ)器和可編程器件補(bǔ)充內(nèi)容 1次 DAC和ADC,Digital Logic Design and Application (

14、數(shù)字邏輯設(shè)計(jì)及應(yīng)用),26,習(xí)題 每次課 2—4題（基本采用教材習(xí)題）； 每章結(jié)束上交，批改后將進(jìn)行針對(duì)性講解，并給出參考解答；每課一題 每次內(nèi)容講解的課上布置，自備一頁(yè)紙完成，要求當(dāng)堂完成上交； 課程設(shè)計(jì) 綜合性考查，組合電路和時(shí)序電路各一次，要求兩周內(nèi)完成后上交；小論文 針對(duì)某個(gè)專題，查閱相關(guān)資料，撰寫自己的認(rèn)識(shí)。,Digital

15、Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),27,教 學(xué) 考 核 方 式,平時(shí)作業(yè)及隨堂考核成績(jī)：15%課程設(shè)計(jì)：10%小論文若干篇，5%期中考試：30%期末考試：40%,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),28,第 1 章作業(yè),讀書報(bào)告： 數(shù)字技術(shù)的發(fā)展歷程要求：根據(jù)數(shù)字技術(shù)的發(fā)展歷程，分析本

16、課程應(yīng)該重點(diǎn)學(xué)習(xí)哪些內(nèi)容？ 學(xué)完本課程后，你應(yīng)該具備哪些方面的能力？提示：仔細(xì)閱讀教材第一章內(nèi)容，同時(shí)可以在網(wǎng)上查閱一些相關(guān)資料，結(jié)合自己的思考，完成2000字以上的讀書報(bào)告。中、英文均可。提交日期：第三周第一次課以前提交方式：電子版 發(fā)到QQ郵箱： 770581831@qq.com,29,傳感器,接收器,信號(hào)發(fā)生器,隔

17、離電路,濾波器,阻抗變換,放大器,運(yùn)算電路,信號(hào)轉(zhuǎn)換電路,比較器,采樣保持,功率放大器,A/D轉(zhuǎn)換,不同的閉環(huán)系統(tǒng)將引入各種不同的反饋！,反饋,,,,,電子系統(tǒng)所包含的知識(shí)點(diǎn)及其相互關(guān)系,脈沖的產(chǎn)生和整形,組合電路時(shí)序電路,單片機(jī),30,,,,,數(shù)字邏輯設(shè)計(jì),微機(jī)原理及接口技術(shù),數(shù)字系統(tǒng)設(shè)計(jì),VLSI 設(shè)計(jì),本課程與后續(xù)課程的關(guān)系,EDA設(shè)計(jì),31,課程的先進(jìn)性,先進(jìn)性主要體現(xiàn)在“元器件”和“方法”,,1947年晶體管,,1958年

18、集成電路,,69年大規(guī)模集成電路,,75年超大規(guī)模集成電路,,20世紀(jì)80年代PLD迅速發(fā)展,,,按10倍/6年集成度發(fā)展,20世紀(jì)90年代模擬可編程器件,20世紀(jì)90年代提出SoC的概念,,PAL GALEPLD CPLDispPLD FPGA,21世紀(jì)初產(chǎn)生PSoC,32,8位微處理器、系統(tǒng)時(shí)鐘源、程序和數(shù)據(jù)存儲(chǔ)器,乘法累加器、低電壓檢測(cè)電路、升壓泵、內(nèi)部參考電壓、模擬多路開關(guān)、大電流輸出驅(qū)動(dòng)……,計(jì)數(shù)器、定時(shí)器、脈寬調(diào)

19、制器、偽隨機(jī)序列發(fā)生器、緩沖器、反相器、全雙工串行通信接口……,可編程增益放大器、儀用放大器、濾波器、電壓比較器、雙音頻撥號(hào)器等,PSoC 結(jié)構(gòu),33,Chapter 1 Introduction (引言),1.1 About Digital Design(關(guān)于 “ 數(shù)字設(shè)計(jì) ”) Another name “Logic Design”. The goal of design is to Build System.

20、Digital Design is engineering, and engineering means “Problem Solving”. Only 5%-10% is the Creative part of Design. Much of the rest is just “Turning the Crank（曲柄）”.Important Themes（主題） in Digital Design（P2),Digital

21、Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),34,34,Why Study Digital Design?,Look “under the hood（覆蓋）” of computersSolid understanding --> better programmer when aware of hardware resource issues,,Years shown above indic

22、ate when digital version began to dominate(Not the first year that a digital version appeared),1.1,35,35,Why Study Digital Design?,Electronic devices becoming digitalEnabled by smaller and more capable chipsEnables:B

23、etter devices: cameras, cars, medical devices, TVs...New devices: smart phones, robots, ..Known as “embedded systems”Thousands of new devices every yearDesigners needed: Potential career direction,,1.1,36,36,What Doe

24、s “Digital” Mean?,Analog signalInfinite(無(wú)限） possible valuesEx: voltage on a wire created by microphone,analog signal,digital signal,Digital signalFinite possible valuesEx: button pressed on a keypad,1.2,37,What Doe

25、s “Digital” Mean?,Analog signalInfinite possible valuesEx: voltage on a wire created by microphone,,,value,time,,,,value,time,,analog signal,digital signal,Digital signalFinite possible valuesEx: button pressed on

26、a keypad,0,1,2,3,4,Possible values:1.00, 1.01, 2.0000009, ... infinite possibilities,Possible values:0, 1, 2, 3, or 4.That’s it.,1.2,38,1.2 Analog versus Digital(模擬與數(shù)字),模擬量：其變化在時(shí)間或數(shù)值上是連續(xù)的數(shù)字量：其變化在時(shí)間和數(shù)量上都是離散的數(shù)值大小

27、是某一個(gè)最小數(shù)量單位的整數(shù)倍,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),39,1.2 Analog versus Digital(模擬與數(shù)字),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Real signal : voice,music,moving picture…Analog signal: voltage chan

28、ged with timeDigital signal : sampling values from analog,40,40,Digital Signals with Only Two Values: Binary,Binary digital signal -- only two possible valuesTypically represented as 0 and 1One binary digit is a bitW

29、e’ll only consider binary digital signals,,,value,time,,1,0,41,41,Digital Signals with Only Two Values: Binary,Binary is popular becauseTransistors the basic digital electric component, operate using two voltages (more

30、 in Chpt. 3)Storing/transmitting one of two values is easier than three or more (e.g., loud beep or quiet beep, reflection or no reflection),42,42,Example of Digitization Benefit,Analog signal (e.g., audio, video) may l

31、ose qualityVoltage levels not saved/ copied/ transmitted perfectly,time,lengthy transmission(e.g, cell phone),lengthy transmission(e.g, cell phone),01,10,11,10,11,,Higher sampling rate and more bits per encoding imp

32、roves re-creation,,,Not a perfect re-creation due to a2d and d2a,Let bit encoding be: 1 V: “01” 2 V: “10” 3 V: “11”,43,43,Example of Digitization Benefit,Digitized version enables near-perfect save/cpy/tran. “Sa

33、mple” voltage at particular rate, save sample using bit encodingVoltage levels still not kept perfectlyBut we can distinguish 0s from 1s,time,lengthy transmission(e.g, cell phone),lengthy transmission(e.g, cell phone

34、),01,10,11,10,11,,Higher sampling rate and more bits per encoding improves re-creation,,,a,Not a perfect re-creation due to a2d and d2a,44,,,,模擬信號(hào)在傳輸過程中失真 數(shù)字信號(hào)仍然可以保持 0、1,,1.2 Analog versus Digital(模擬與數(shù)字),Digital Lo

35、gic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),45,1.2 Analog versus Digital(模擬與數(shù)字),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),The problem for Analog signal,Easy to be disturb (干擾）Shift with temperature Hard to be reco

36、rdedCan not express abstract information,46,1.2 Analog versus Digital(模擬與數(shù)字),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),The advantage of digital signal,On each data line, the signal is very simpleNot influenced

37、 by circumstance and deviceCan be recorded and transmitted easilyAny information can be code,47,1.2 Analog versus Digital(模擬與數(shù)字),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),Digital system,Any inputs and outputs

38、 can only be 1 or 0 !,Use logic to determine each output : 1 or 0 ?,48,48,How Do We Encode Data as Binary for Our Digital System?,Some inputs inherently binaryButton: not pressed (0), pressed (1)

39、Some inputs inherently digitalJust need encoding in binarye.g., multi-button input: encode red=001, blue=010, ...,49,49,How Do We Encode Data as Binary for Our Digital System?,Some inputs analogNeed analog-to-digital

40、 conversionsample and encode with bits,50,1.2 Analog versus Digital(模擬與數(shù)字),Digital Circuits over Analog Ones (數(shù)字系統(tǒng)及其優(yōu)越性)Reproducibility of Results [結(jié)果再現(xiàn)性（穩(wěn)定可靠、精度更高）]Ease of design, Flexibility, and Functional

41、ity (易于設(shè)計(jì)，靈活性和功能性)Programmability [可編程性（HDL 硬件描述語(yǔ)言）]Speed, Economy, and Steadily Advancing Technology (快速、經(jīng)濟(jì)、穩(wěn)步發(fā)展的技術(shù)),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),51,51,Digitization Benefit: Can Store on

42、Digital Media,Store on CD, USB drive, etc. No deterioration （衰減）.,52,52,Digitized Audio: Compression Benefit,Digitized audio can be compressede.g., MP3sA CD can hold about 20 songs uncompressed, but about

43、200 compressedCompression also done on digitized pictures (jpeg), movies (mpeg), and moreDigitization has many other benefits too,53,53,Digitized Audio: Compression Benefit,0000000000 0000000000 0000001111 1111111111,1

44、0000001111,Example compression scheme:00 means 000000000001 means 11111111111X means X,,,,,00,00,01,54,Future: Maybe Everything will be Digitized…,54,55,1.3 Digital Devices (數(shù)字器件),Gates（門電路）： —— The most basic

45、 digital devices (AND Gate, OR Gate, and NOT Gate or Inverter) [最基本的數(shù)字器件（與、或、非門或反相器]Flip-flops（觸發(fā)器）： —— A device that stores either 0 or 1 (一種能存儲(chǔ) 0 或 1 的器件),Digital Logic Design and Applicati

46、on (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),56,1.3 Digital Devices (數(shù)字器件),Figure 1-1 Digital Devices (a) AND Gate (b) OR Gate (c) NOT Gate or Inverter,,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),57,Basic device in digital system,Buffer,T

47、ruth table,Diagram,Equation,58,Basic device in digital system,NOT gate (inverter , INV),Truth table,Diagram,Equation,59,AND gate,diagram,equation,Truth table,Basic device in digital system,60,OR gate,Basic device in dig

48、ital system,equation,diagram,Truth table,61,NAND,NOR,Basic device in digital system,62,XOR,Basic device in digital system,63,Question,How many kinds of output combinations of 2 input veriables are，except AND OR NAND NOR

49、XOR logic?(除了與、或、與非、或非、異或邏輯運(yùn)算以外，兩個(gè)輸入變量的邏輯運(yùn)算還有多少種輸出組合？）,64,Number of Possible Boolean Functions,How many possible functions of 2 variables?22 rows in truth table, 2 choices for each2(22) = 24 = 16 possible functionsN

50、 variables2N rows2(2N) possible functions,65,The target of digital design,Gates design Design basic device by transistors Functional design Design functional circuits by basic device combinational logi

51、c circuits sequential logic circuits,66,1.3 Digital Devices (數(shù)字器件),Combinational Circuits（組合電路） Device(器件) Define(定義)Sequential Circuits（時(shí)序電路） Device(器件) Define(定義),Digital Logic Design and

52、 Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),67,1.4 Electronic Aspects of Digital Design (數(shù)字設(shè)計(jì)的電子技術(shù)),How to realize Logic 0 and 1 in a Real circuit? (邏輯上的 0 和 1 在物理上如何實(shí)現(xiàn)？)What is the range of analog value with each logic value(0 or 1)

53、 [什么電平范圍對(duì)應(yīng)邏輯 0（或 1）？]How to produce and figure out the signal in a proper range? (如何正確產(chǎn)生和識(shí)別處于適當(dāng)范圍的信號(hào)？)The association between Digital and Analog (數(shù)字與模擬之間的關(guān)系),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),68,1

54、.5 Software Aspects of Digital Design (數(shù)字設(shè)計(jì)的軟件技術(shù)),Software tools help to improve the designer’s productivity, the correctness and quality designs. ( 軟件工具有助于提高設(shè)計(jì)的效率、正確性和質(zhì)量。)Several Software Tools (幾種軟件工具 P9）Pspise

55、,multisim,電路仿真----模擬電路Ise,MaxPlusII, QuatusII, Moldelsim仿真----數(shù)字電路protel,powerPCB，制版軟件----布版布線,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),69,1.6 Integrated Circuits（集成電路，IC）,Wafer(單晶硅片）－》Die (模片）,Digital Logic

56、Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),70,1.6 Integrated Circuits（集成電路，IC）,Wafer(單晶硅片）－》Die (模片） Dual In-line-pin Package (DIP, 雙列直插式封裝)(P13),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),,71,1.6 Integrated Circuits

57、（集成電路，IC）,Wafer(單晶硅片）－》Die (模片） Dual In-line-pin Package (DIP, 雙列直插式封裝)(P13) Small-Scale Integration (SSI，小規(guī)模集成): 1-20 Gates Medium-Scale Integration (MSI，中規(guī)模集成): 20-200 Gates Large-Scale Integra

58、tion (LSI，大規(guī)模集成): 200-1,000,000 Gates Very Large-Scale Integration (VLSI，超大規(guī)模集成): Over 1,000,000 Transistors,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),72,Digital Logic Design and App

59、lication (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),幾種7400系列SSI IC的引腳圖,,73,1.7 Programmable Logic Devices (可編程邏輯器件),Programmable Logic Array (PLA, 可編程邏輯陣列)Programmable Array Logic (PAL, 可編程陣列邏輯)Programmable Logic Device (PLD, 可編程邏輯器件)Co

60、mplex PLD (CPLD, 復(fù)雜可編程邏輯器件)Field-Programmable Gate Array (FPGA, 現(xiàn)場(chǎng)可編程門陣列）,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),74,1.7 Programmable Logic Devices (可編程邏輯器件),大型可編程邏輯元件的擴(kuò)展方法,Digital Logic Design and Applicat

61、ion (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),,75,1.8 Application-Specific ICs [專用集成電路（ASIC）],Semi-Custom IC (半定制IC) Non-Recurring Engineering (NRE) Cost (非再現(xiàn)工程成本）: $10,000 - $500,000 Custom IC (全定制IC）NRE Cost: Over $500,000,

62、Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),76,1.9 Printed-Circuit Boards (PCB, 印制電路板),Printed-Wiring Boards (PWB,印制線路板) Surface-Mount Technology (SMT, 表面安裝技術(shù)) Multi-Chip Module (MCM, 多

63、芯片模塊） SoC,NoC(System on Chip, Network on Chip)(片上系統(tǒng)，片上網(wǎng)絡(luò)),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),77,印制電路板 (PCB, Printed-Circuit Boards),Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),78,1.10 Digital

64、Design Levels （數(shù)字設(shè)計(jì)層次）,Device Physics Level (器件物理層） IC Manufacturing Process Level （IC 制造過程級(jí)） Transistor Level (晶體管級(jí)） Gates Structure Level (門電路結(jié)構(gòu)級(jí)） Logic Design Level （邏輯設(shè)計(jì)級(jí)） Overall System Design

65、 （整體系統(tǒng)設(shè)計(jì)）,Digital Logic Design and Application (數(shù)字邏輯設(shè)計(jì)及應(yīng)用),79,Implementing Digital Systems: Programming Microprocessors Vs. Designing Digital Circuits,Microprocessors a common choice to implement a digital systemEasy

66、to programCheap (as low as $1)Readily available,,Desired motion-at-night detector,Programmedmicroprocessor,Custom designeddigital circuit,1.3,80,80,,Implementing Digital Systems: Programming Microprocessors Vs. Desig

67、ning Digital Circuits,I,3,I,4,I,5,I,6,I,7,I,2,I,1,I,0,,,,,,,,,,,,,,,,,,P3,P4,P5,P6,P7,P2,P1,P0,,void main(){ while (1) { P0 = I0 && !I1; // F = a and !b, }},,,,,,,,0,F,b,a,1,0,1,0,1,,,,6:00,7

68、:05,7:06,9:00,9:01,time,Programmedmicroprocessor,1.3,81,81,Digital Design: When Microprocessors Aren’t Good Enough,With microprocessors so easy, cheap, and available, why design a digital circuit?Microprocessor may be

69、too slowOr too big, power hungry, or costly,Wing controller computation task: 50 ms on microprocessor 5 ms as custom digital circuitIf must execute 100 times per second: 100 * 50 ms = 5000 ms = 5 seconds 100 * 5 m