通用并網(wǎng)變換器同步鎖相環(huán)的研究.pdf

1、西安理工大學(xué)碩士學(xué)位論文通用并網(wǎng)變換器同步鎖相環(huán)的研究姓名：李育寧申請學(xué)位級(jí)別：碩士專業(yè)：電力系統(tǒng)及其自動(dòng)化指導(dǎo)教師：同向前20080301里窒里三查芏壁主壘查———_————————————————————————————_——_——————————————————————一一一Title：STUDYONPHASELOCKEDLOOPFORGRIDCONNECTEDCONVERTERSMajor：ElectricPowerSystem

2、andAutomationAuthor：LiYuningSupervisor：ProfTongXiangqianDate：March，2008AbstractSignature：Signature：露1mphase—lockedsynchronizationtechnologyisacominonquestioninthegrid‘connectedconverters。andalsoisamostbasicquestioninthec

3、onvenercontrolsystemThequalityofthephase10ckedloopaffectsdirectlytheperformanceofthecontrolloopsintheconnectedconvenerUndervoltageunbalanceanddistortionitisnecessarytocapturethephaseofvoltagepositivesequencefundamentalco

4、mponentaccuratelyMoreoverthesignalfrequency1sNtimesⅡlaIlpowernetfrequencyanditissampledinequalintervalThemosteffectiveway15usuallyusingthephase—lockedloop(PLL)InthisanicleⅡlefundamentaltheorytheworkstatus，thebasiccomposi

5、tionandmamematicphasemodelofPLLarediscussedAimingatunbalancedanddistortedvoltagempoWernet，thephasedetectoralgorithmbasedondqvectortransformationISstudied，whicncaneliminate如nd鋤entalnegativesequencevoltageandharmonicsObtai

6、neddirect‘currentvol詛gecomponentrefleetsphaseerrorSignaldelaycancellationtechnology(DSC)isadoptedtoelimiIlate也enegativesequenceTheparameterdesignmethodofPLLisobtainedthroughestablishingPLLtransferfunctionBasedontheMATLAB

7、simulationsoftware，PLLdynamicsimulationmodelisestablishedParametersvaluesareobtailledandthealgorithmisverifiedThesystembasedondigitaIslgnalprocessor(DSP)isdevelopedThehardwarecircuitandsoRwaresystemofexperimem1sacheviedo

8、nTMS320LF2407EVM‘a(chǎn)ppraisedpanelTheexperimentalresultsshowthattheoutputsignalCantrackthefrequencyandthephaseofthepowernetvoltagerapidlyKeywords：Voltagedistortion；Phase10ckedloop；SignaldelaycancellationtechnologY(DSC)；Fund