外文翻譯——基于壓降型pwm開(kāi)關(guān)電源的建模、仿真和單片機(jī)簡(jiǎn)介

1、<p><b>　　畢業(yè)設(shè)計(jì)(論文)</b></p><p><b>　　英 文 翻 譯</b></p><p>　　題 目 基于單片機(jī)的數(shù)字PWM控制器設(shè)計(jì)與應(yīng)用—硬件</p><p>　　學(xué) 院 

2、 </p><p>　　專業(yè)及班級(jí) </p><p>　　姓 名 <

3、;/p><p>　　學(xué) 號(hào) </p><p>　　指 導(dǎo) 教 師

4、 </p><p>　　日 期 2012年6月9日 </p><p>　　Modeling, Simulation Due to a PWM Buck Type Switching Power and MCU</p><

5、;p>　　Abstract: Introduce a kind of dormancy of using- restore to the throne in the operation way and improve the anti-interference ability method of the one-chip computer; Analyses its scope of application, provide an

6、d use the circuit concretely; Combine the instance, analyze the characteristic of the hardware and software design under these kind of operation way. </p><p>　　Keyword: One-chip computer Restore to the thron

7、e /dormancy anti-interference Foreword</p><p>　　Introduction: </p><p>　　With the development at full speed of the micro electric technique, the performance of the one-chip computer improves rapi

8、dly, demonstrate the outstanding advantage in the operation, logic control, intelligent respect, replaced and enlarged the measuring that the circuit made up, control circuit by digital logical circuit, operation origina

9、lly to a great extent, use very extensively. But because it have system halted, procedure run critical defect of flying etc, make it limit in a lot of importa</p><p>　　1.A principle and implementation method

10、</p><p>　　1.1 Restored to the throne the law regularly unconditionally</p><p>　　Use timer, special-purpose clock chip or other pulse generator, produce signal of restoring to the throne regularl

11、y according to interval that set for. This kind of method is especially suitable for the measuring instrument. In not running actually, sample the analog quantity of introduction with A/D converter often, then store show

12、ing. This course is very fast, but steady for reading, the data per second are only upgraded 1 -2 times, a large amount of time of CPU is used for waiting. Let CPU ca</p><p>　　1.2 The external condition is r

13、estored to the throne the law</p><p>　　Some arrival that export or measure is controlled by the outside. For instance, the hot form. of heating, rotate the pulse produced and calculate heat by hot water whee

14、ls, there is no hot water to flow, there is no heat to export, CPU only need in fact keep number value, do not need to count. Can imagine hot water wheels rotate when parking warm , CPU idle in will it be will it be one

15、season autumn spring and summer, If let dormancy its , measure have water wheels pulse constantly, anti-interfer</p><p>　　2 .The hardware realizes the main point</p><p>　　2.1 Restored to the thr

16、one regularly unconditionally</p><p>　　Generally have 2 kinds of methods. ① Use the timer or the special-purpose clock chip to be restored to the throne. Fig1, in order to use the timing circuit that 555 cir

17、cuit makes up; Can use the clock chips of X1126 ,etc too , wake CPU up with the alarm signal after setting up warning time. This kind of method is suitable when the long interval is made, can also follow the result of th

18、is operation ，determine to wake time up in alarm next time temporarily, very flexible and convenient. ② The sign</p><p>　　2.2 External conditions are restored to the throne </p><p>　　Send extern

19、al condition pulse to and is restored to the throne the end son after having a facelift. To that above-mentioned water wheels or the ammeter spend a pulse produced, can use Schmitt's trigger to have a facelift; For w

20、riting down the instrument of the biggest or minimum，can use the window comparator. In order to realize the electrification that is regulated，can use the electronic electric potential device, establish upper and lower li

21、mits with the order of the one-chip computer.</p><p>　　2.3 Reduce cycle and restored to the throne the high electricity at ordinary times</p><p>　　In Fig3, restored to the throne the signal duri

22、ng high level Tr, the one-chip computer is in the state of restoring to the throne, the procedure does not run, anti-interference ability is the strongest; After the high level, the one-chip computer begins to hold the c

23、onduct procedure. That is to say, are restored to the throne and suitable for the time that the procedure carries out during the low level Td of the signal, this time should be greater than the execution cycle of the pro

24、cedure each t</p><p>　　2.4 Treatment of output end sons</p><p>　　(1) Restore to the throne straight pulse</p><p>　　During all I/O mouth of one-chip computer turn into the high level

25、 when restoring to the throne. That is to say output for low pin normally, will according to restore to the throne cycle appear the width for the straight pulse of Tr. This straight pulse will influence the normal output

26、, 2 methods are dealt with: ①  Connect in parallel electric capacity suppress , capacity confirm according to Tr time that restore to the throne on the son in end. Reducing Tr can be reduced and connected the elect&

27、lt;/p><p>　　(2) Fault-tolerant</p><p>　　Choose the capacity that the output end connects the electric capacity in parallel fault-tolerantly and properly, can realize fault-tolerant control. Reduced

28、 cycle in a certain, because interfered exporting the wrong level. Because the keeping function of electric capacity, can't still enable exporting the change to the valid level within this cycle; Next cycle , the mis

29、take is corrected. So, so long as does not make mistakes in 2 cycles in succession, it is very fault-tolerant to export Certain</p><p>　　2.5 has the electricity to measure and restore to the throne manually&

30、lt;/p><p>　　Some system is it make some initialize and operate to want at electricity for the first time. Restored to the throne and already become the beginning condition of normal running each time while adop

31、ting the way of restoring to the throne to run , it is unable to distinguish and have the electricity for the first time. In some pin connects the electric capacity of one1PF to the ground, measure this pin after being r

32、estored to the throne, if low level to have electricity for the first time. Give s</p><p>　　3. The software realizes the main point</p><p>　　3.1 is it resume with zero clearing RAM to output<

33、/p><p>　　Restore to the throne the last all pin turn high level into , is it should take place unnecessary change for low pin to make regularly, so, should resume the state. of all pins immediately after being

34、restored to the throne. There are 2 kinds of methods : ① Analyze and judge immediately after being restored to the throne this time, provide the state of the pin according to the need; ② In being RAM it is the last state

35、 that come down, these RAM when restored. To the throne regularly can the zero </p><p>　　3.2 realizes crossing over and is restored to the throne alternate time sequence</p><p>　　regularly to co

36、ntrol</p><p>　　Work in way of restoring to the throne now, start anew and carry out the same procedure repeatedly each time. Can be divided into 2 kinds of situations: ① As to simple to show instrument, carr

37、y on measurement ，send off showing after being restored to the throne each time, have causality between restoring to the throne twice . need is it switch over to the dormancy to waiting original only. Should pay attentio

38、n to, measurement, give total time used to show is it is it restore to the throne low el</p><p>　　In 4 Fig, act as person who protect the beginning at the electricity, is it transmit power 0 to try at first.

39、 5s, points out and transmits power soon; Transmit power formally after waiting for 30s. It is start-up time in 1s after transmitting power, does not measure the electric current. Start after finishing, if all going well

40、, the location is put" normal sign ", person who protect restore to the throne cycle enter normal running in the next one. Try 0 that transmits power. 5s is it is it reali</p><p><b>　　Result:

41、</b></p><p>　　Conclusion Anti-interference is an important problem in an electronic design, especially Important in the one-chip computer. This is because the one-chip computer has procedures to run pa

42、rticularity that flies, the consequence that it is interfered may be the system halted, may send out various kinds of mistakes or illegal movements before the system halted too, make the whole system produce the mortalit

43、y mistake. So, only guarantee it is not enough yet for one-chip computer not to crash, study </p><p>　　I.FAST semiconductors make it possible to have high speed and high frequency switching in power electron

44、ics . High speed switching causes weight and volume reduction of equipment, but some unwanted effects such as radio frequency interference appeared . Compliance with electromagnetic compatibility (EMC) regulations is nec

45、essary for producers to present their products to the markets. It is important to take EMC aspects already in design phase . Modeling and simulation is the most effective tool </p><p>　　II. SOURCE, PATH AND

46、VICTIM OF EMI </p><p>　　Undesired voltage or current is called interference and their cause is called interference source. In this paper a high-speed switching power supply is the source of interference. <

47、;/p><p>　　Interference propagated by radiation in area around of an interference source or by conduction through common cabling or wiring connections. In this study conducted emission is considered only. Equipm

48、ent such as computers, receivers, amplifiers, industrial controllers, etc that are exposed to interference corruption are called victims. The common connections of elements, source lines and cabling provide paths for con

49、ducted noise or interference. Electromagnetic conducted interference has two com</p><p>　　A. Differential mode conducted interference </p><p>　　This mode is related to the noise that is imposed

50、between different lines of a test circuit by a noise source. Related current path is shown in Fig. 1 . The interference source, path impedances, differential mode current and load impedance are also shown in Fig. 1. <

51、/p><p>　　B. Common mode conducted interference </p><p>　　Common mode noise or interference could appear and impose between the lines, cables or connections and common ground. Any leakage current be

52、tween load and common ground could be modeled by interference voltage source. </p><p>　　Fig. 2 demonstrates the common mode interference source, common mode currents Icm1 and Icm2 and the related current pat

53、hs. The power electronics converters perform as noise source between lines of the supply network. In this study differential mode of conducted interference is particularly important and discussion will be continued consi

54、dering this mode only. </p><p>　　III. ELECTROMAGNETIC COMPATIBILITY REGULATIONS </p><p>　　Application of electrical equipment especially static power electronic converters in different equipment

55、 is increasing more and more. As mentioned before, power electronics converters are considered as an important source of electromagnetic interference and have corrupting effects on the electric networks . High level of p

56、ollution resulting from various disturbances reduces the quality of power in electric networks. On the other side some residential, commercial and especially medical consumers </p><p>　　For different groups

57、of consumers different classes of regulations could be complied. Class A for common consumers and class B with more hard limitations for special consumers are separated in Fig. 3 and Fig. 4. Frequency range of limitation

58、 is different for IEC and VDE that are 150 kHz up to 30 MHz and 10 kHz up to 30 MHz respectively. Compliance of regulations is evaluated by comparison of measured or calculated conducted interference level in the mention

59、ed frequency range with the stated requ</p><p>　　IV. ELECTROMAGNETIC CONDUCTED INTERFERENCE MEASUREMENT </p><p>　　A. Line Impedance Stabilization Network (LISN)</p><p>　　1-Providing

60、 a low impedance path to transfer power from source to power electronics converter and load. </p><p>　　2-Providing a low impedance path from interference source, here power electronics converter, to measurem

61、ent port. </p><p>　　Variation of LISN impedance versus frequency with the mentioned topology is presented in Fig. 7. LISN has stabilized impedance in the range of conducted EMI measurement . </p><

62、p>　　Variation of level of signal at the output of LISN versus frequency is the spectrum of interference. The electromagnetic compatibility of a system can be evaluated by comparison of its interference spectrum with t

63、he standard limitations. The level of signal at the output of LISN in frequency range 10 kHz up to 30 MHz or 150 kHz up to 30 MHz is criterion of compatibility and should be under the standard limitations. In practical s

64、ituations, the LISN output is connected to a spectrum analyzer and </p><p>　　基于壓降型PWM開(kāi)關(guān)電源的建模、仿真和單片機(jī)簡(jiǎn)介</p><p>　　摘要：介紹了一種使用休眠，復(fù)位的運(yùn)作方式，提高了單芯片電腦的抗干擾能力的方法，分析了其應(yīng)用范圍，提供和使用的具體電路，結(jié)合實(shí)例，根據(jù)這些分析的一種運(yùn)作方式的硬件和軟件

65、設(shè)計(jì)的特點(diǎn)。 </p><p>　　關(guān)鍵字：?jiǎn)纹瑱C(jī) 復(fù)位/休眠 抗干擾</p><p><b>　　簡(jiǎn)介： </b></p><p>　　隨著在微電子技術(shù)的飛速發(fā)展，在單片機(jī)的性能迅速提高，充分展示了高速發(fā)展的運(yùn)作，邏輯控制，智能方面所取代，突出優(yōu)勢(shì)，擴(kuò)大了該電路組成，控制電路通過(guò)測(cè)量數(shù)字邏輯電路，操作本來(lái)在很大程度上，使用非常廣泛存在。但是，

66、由于它具有系統(tǒng)停止，程序運(yùn)行等關(guān)鍵飛行的缺陷，使之限制在一個(gè)重要應(yīng)用的場(chǎng)合很多。一種技術(shù)在防干擾很多，例如設(shè)立了軟件陷阱，添加看守在狗的門電路等，可以使這個(gè)問(wèn)題比較好的解決，但仍然存在的問(wèn)題：①看門狗平均和出現(xiàn)的錯(cuò)誤已經(jīng)和運(yùn)行一段時(shí)間，這不是在某些情況下允許;②程序出現(xiàn)循環(huán)錯(cuò)誤很有時(shí)，只是看門狗控制環(huán)節(jié)，包括進(jìn)入，通過(guò)和防范作為這樣一個(gè)錯(cuò)誤的狗無(wú)法分辨門;在測(cè)量和控制系統(tǒng)之間的長(zhǎng)周期③，單芯片計(jì)算機(jī)花等周邊硬件的大量時(shí)間，也將受到干擾時(shí)

67、進(jìn)行，并等待秩序。對(duì)于這些情況，我們?cè)噲D復(fù)位自愿的方法在實(shí)踐中，采用等或復(fù)位交替脈沖醒來(lái)根據(jù)外部條件，一個(gè)芯片的電腦?；謴?fù)后的寶座每次，單片機(jī)進(jìn)行相應(yīng)的程序，輸入完畢后及時(shí)進(jìn)行任務(wù)休眠，等待復(fù)位。解決了上述問(wèn)題以及與此法，并已得到改善，農(nóng)業(yè)綜合保護(hù)電壓互感器的實(shí)驗(yàn)結(jié)果。現(xiàn)在51系列為例，進(jìn)入具體的原則和實(shí)施方法復(fù)位，作為高層次的信號(hào)，探測(cè)單芯片計(jì)算</p><p><b>　　1原則和實(shí)施方法<

68、/b></p><p>　　1.1復(fù)位定期無(wú)條件的法律</p><p>　　使用定時(shí)器，專用時(shí)鐘芯片或其它脈沖發(fā)生器，產(chǎn)生的信號(hào)復(fù)位，定期根據(jù)間隔設(shè)定。這種方法尤其適合用于測(cè)量?jī)x器。在沒(méi)有實(shí)際運(yùn)行，樣品中與A / D轉(zhuǎn)換器的模擬量往往介紹，然后將其存儲(chǔ)顯示。這當(dāng)然是非?？斓?，但對(duì)于閱讀穩(wěn)定，每秒的數(shù)據(jù)只是提升1-2倍，有大量的CPU時(shí)間是等待使用。讓CPU的執(zhí)行任務(wù)，并直接進(jìn)入休眠后

69、，恢復(fù)了外部世界的寶座，喚醒它進(jìn)行下一個(gè)操作，這是復(fù)位法律經(jīng)常通過(guò)這種方式可以使抗干擾能力大大加強(qiáng)，主要有2點(diǎn)：①。在休眠，程序停止運(yùn)行，可以顯示電腦的指標(biāo)，導(dǎo)致無(wú)序程序運(yùn)行和飛行。工作時(shí)間在休眠比例1:9，即1秒的時(shí)間有0.1 s的測(cè)量使用，送顯示，有休眠時(shí)間0.9s，該過(guò)程的概率是干涉是1 / 10，而在運(yùn)行全速，全抗干擾能力提高10倍。 ②由于每1秒恢復(fù)一次無(wú)條件的寶座，一旦停止工作期間提出的制度，一定能夠復(fù)位時(shí)恢復(fù)到下一次。至于

70、唯一的工具，展示，閱讀一些錯(cuò)誤，1秒，沒(méi)有出現(xiàn)意外的下一次測(cè)量的記憶，是可以承受的，屬于“通行證”的錯(cuò)誤。這種復(fù)位的把關(guān)，定期對(duì)狗的電路優(yōu)勢(shì)，首先，改變等待進(jìn)入休眠狀態(tài)的時(shí)間，時(shí)間縮短，可能會(huì)受到干擾，二是避免死循環(huán)。</p><p>　　1.2外部條件是復(fù)位</p><p>　　有些來(lái)接口是由外部控制。例如，在炎熱的形式。加熱，旋轉(zhuǎn)產(chǎn)生的脈沖，并計(jì)算熱水水輪熱量，沒(méi)有熱水流動(dòng)，沒(méi)有熱量導(dǎo)

71、出，只需要在CPU的事實(shí)使數(shù)值，不需要計(jì)數(shù)。可以想像熱水水輪旋轉(zhuǎn)時(shí)停車溫暖，它是將CPU的閑置會(huì)是一個(gè)秋天的季節(jié)春天和夏天，如果允許其休眠，測(cè)量脈搏，不斷有水車輪，抗干擾能力可以大大加強(qiáng)。因此，只要連接起來(lái)，恢復(fù)到水車輪和CPU脈沖寶座，水車輪轉(zhuǎn)動(dòng)一圈，每次CPU是復(fù)位后，熱的形式?？梢哉９ぷ?，這是復(fù)位的法律的外部條件。類似的應(yīng)用程序有一半的電子電度表，去一項(xiàng)就在車輪和機(jī)械程度轉(zhuǎn)移到一個(gè)圓圈，用戶不需要電力，CPU已經(jīng)知道所有的休眠時(shí)

72、間。在恢復(fù)到在間隔不進(jìn)行定期的寶座，但據(jù)證實(shí)了該方法的外部條件。在某些情況下，這些休眠時(shí)間會(huì)很長(zhǎng)，很有效的提高抗干擾能力。</p><p>　　2。硬件實(shí)現(xiàn)的主要問(wèn)題 </p><p>　　2.1復(fù)位定期無(wú)條件</p><p>　　一般有2種方法。 ①使用時(shí)鐘信號(hào)或?qū)Ｓ眯酒瑫r(shí)鐘復(fù)位。圖1，為了使用定時(shí)電路，555電路構(gòu)成，可以使用X1126，時(shí)鐘芯片等也醒來(lái)后設(shè)立預(yù)

73、警時(shí)間報(bào)警信號(hào)處理器了。這種方法適用于長(zhǎng)間隔時(shí)作出，也可以按照這個(gè)操作的結(jié)果，確定報(bào)警喚醒時(shí)間在下一次暫停，非常靈活方便。 ②在使用該系統(tǒng)將固有的信號(hào)是降低脈沖定時(shí)。使用50赫茲工人權(quán)力作出減少后煥然一新頻繁，已經(jīng)省略了定時(shí)器，該階段收集到的地方在同一時(shí)間測(cè)量的電流信號(hào)。</p><p>　　2.2外部條件，復(fù)位</p><p>　　發(fā)送脈沖和外部條件是復(fù)位后煥然一新，最后兒子。為此上述水

74、輪或電表脈沖產(chǎn)生的花費(fèi)，可以使用施密特觸發(fā)器有煥然一新;對(duì)于寫(xiě)下的最大或最小值，可以使用窗口比較器的工具。為了實(shí)現(xiàn)電子化監(jiān)管的是，可以使用電子電位器，建立上，同一個(gè)電腦芯片訂單下限。</p><p>　　2.3降低循環(huán)，復(fù)位的高電平時(shí)</p><p>　　在圖3，恢復(fù)了在高級(jí)別章，單片機(jī)的寶座的信號(hào)在復(fù)位狀態(tài)時(shí)，程序不運(yùn)行，抗干擾能力最強(qiáng);高級(jí)別后，一個(gè)芯片計(jì)算機(jī)開(kāi)始舉行的行為過(guò)程。這就是

75、說(shuō)，被還原的時(shí)間，程序執(zhí)行過(guò)程中的信號(hào)運(yùn)輸署低一級(jí)的寶座和合適的，這時(shí)候應(yīng)該比的程序每次執(zhí)行周期更大。這是復(fù)位循環(huán)，復(fù)位信號(hào)高級(jí)別采取空比非常重要的理性選擇。至于簡(jiǎn)單的顯示儀，復(fù)位周期確定數(shù)據(jù)打破循環(huán)，低電力是它的措施，顯示了在平時(shí)要大于希望所有的時(shí)間;否則，目前的永遠(yuǎn)是傾斜的完整的行政程序的錯(cuò)誤。單片集成電路在TS和Tr期間都能有效地抗干擾，但最好是在章不必要的時(shí)間安排。當(dāng)程序時(shí)間長(zhǎng)，時(shí)盡可能降低章的要求。</p>&l

76、t;p><b>　　2.4輸出端引腳</b></p><p><b>　?。?）復(fù)位直脈沖</b></p><p>　　在所有的I /單芯片打開(kāi)計(jì)算機(jī)?口進(jìn)入高級(jí)別時(shí)復(fù)位。這就是通常說(shuō)的低接腳輸出，將根據(jù)復(fù)位的周期出現(xiàn)了連續(xù)的脈沖寬度章。這將直接影響到正常的脈沖輸出，2種方法是并行處理的電容量：①連接壓制能力確認(rèn)時(shí)間，按章對(duì)恢復(fù)年底兒子的寶

77、座。章降低可以減少并行連接的電容量。 ②它是無(wú)效的設(shè)計(jì)到高一級(jí)的外圍電路。 </p><p><b>　?。?）容錯(cuò)</b></p><p>　　選擇能力，使輸出端連接在并行故障寬容，妥善電容，可以實(shí)現(xiàn)容錯(cuò)控制。減少在一定周期，因?yàn)槌隹诘腻e(cuò)誤干擾的水平。由于電容量保持功能，使出口仍然不能在這個(gè)周期的改變，有效水平;在下一個(gè)周期，這個(gè)錯(cuò)誤被糾正。因此，只要不作連續(xù)2次失

78、誤，這是非常容錯(cuò)出口當(dāng)然，這種方法會(huì)為一個(gè)周期，正常的輸出變化滯后只是背后真正反映輸出端的兒子。</p><p>　　2.5具有電力測(cè)量和手動(dòng)復(fù)位</p><p>　　有些系統(tǒng)是它使一些初始化和運(yùn)行在首次電力想要的。復(fù)位，并已開(kāi)始成為正常運(yùn)行的條件而采取的每一次復(fù)位運(yùn)行方式，它是無(wú)法區(qū)分，并有第一次電。在某些引腳連接一個(gè)1 PF電容在地上，衡量這一針后正在恢復(fù)的寶座，如果水平低有第一次電。

79、給系統(tǒng)設(shè)置一個(gè)復(fù)位按鈕，即一個(gè)常見(jiàn)的手動(dòng)復(fù)位，這個(gè)按鈕是沒(méi)有加入和正在恢復(fù)到最后的寶座，是在電容量并聯(lián)兩端對(duì)上述引腳接地。</p><p>　　3.該軟件實(shí)現(xiàn)的主要問(wèn)題 </p><p>　　3.1是它恢復(fù)與清零RAM來(lái)輸出</p><p>　　復(fù)位上的所有引腳轉(zhuǎn)成高層次，是否應(yīng)該進(jìn)行不必要的改變?yōu)榈鸵_使定期，因此，應(yīng)立即恢復(fù)所有引腳后復(fù)位的。有2種方法：①分析和

80、判斷后，立即復(fù)位這一次，提供該引腳的狀態(tài)根據(jù)需要，在被內(nèi)存②它是最后的最后狀態(tài)下降的時(shí)候，這些時(shí)候恢復(fù)存儲(chǔ)器。為了王位經(jīng)?？梢粤愕囊粔K空地上，但電力或手冊(cè)時(shí)，按照積極推動(dòng)清零，是它體現(xiàn)了想要的工作時(shí)，該軟件是在開(kāi)始比賽。如果時(shí)間允許計(jì)算，盡力采取方法1。復(fù)位周期來(lái)計(jì)算概率的失誤很少，根據(jù)二為連續(xù)第二次。 4個(gè)輸出端的引腳，敘述在并行連接電容的治療方法，可以達(dá)到一種抗干擾的結(jié)果非常。</p><p>　　3.2實(shí)現(xiàn)

81、跨越，是復(fù)位交替的時(shí)間序列 </p><p><b>　　定期向控制</b></p><p>　　工作恢復(fù)到現(xiàn)在的寶座，重新開(kāi)始，并進(jìn)行同樣的程序反復(fù)每次途徑。可分為2種情況：①對(duì)于簡(jiǎn)單的顯示儀上進(jìn)行測(cè)量，顯示送行后，復(fù)位，每次都復(fù)位之間因果關(guān)系的兩倍。需要的是它切換到休眠等候原來(lái)只。要注意，測(cè)量，給總時(shí)間用來(lái)顯示是否是它恢復(fù)到平時(shí)的寶座低電力小于想要，否則永遠(yuǎn)無(wú)法出

82、席了完整的行政程序的錯(cuò)誤。因時(shí)間順序控制的應(yīng)用程序，②，恢復(fù)后的寶座每一次，應(yīng)該首先檢查該標(biāo)志左側(cè)看到最后一個(gè)周期，以確定什么是完成這個(gè)周期。這就是說(shuō)每一個(gè)是它恢復(fù)了運(yùn)作周期寶座邁進(jìn)，它是通過(guò)將所有傳輸，這表明在內(nèi)部RAM中，而離開(kāi)，只有當(dāng)零結(jié)算有第一次電。例如，綜合的保護(hù)上述變壓器設(shè)備，復(fù)位，定期根據(jù)20ms的間隔。達(dá)到正常工作狀態(tài)通過(guò)一定的運(yùn)動(dòng)命令后，如圖電力。 4，寫(xiě)一個(gè)軟件程序的一部分，如按照此圖運(yùn)動(dòng)。 5，誰(shuí)保護(hù)的人開(kāi)始在電力

83、法，它是發(fā)射功率0嘗試在第一。 5秒，指出并很快傳輸功率;發(fā)射功率為30秒后正式等待。這是啟動(dòng)時(shí)間在1秒后發(fā)射功率，并沒(méi)有測(cè)量電流。啟動(dòng)完成后，如果一切順利，該位置是放在“正常標(biāo)志”，誰(shuí)保護(hù)的人復(fù)位周期進(jìn)入下一個(gè)正常運(yùn)行。嘗試0，傳遞力量。 5S是它是否實(shí)現(xiàn)計(jì)數(shù)一次復(fù)位，以拖延時(shí)間，復(fù)位</p><p><b>　　結(jié)果： </b></p><p>　　結(jié)論反干擾是一

84、種在電子設(shè)計(jì)的重要問(wèn)題，特別是在單芯片計(jì)算機(jī)的重要。這是因?yàn)閱涡酒挠?jì)算機(jī)程序來(lái)運(yùn)行的特殊性是蒼蠅，它的后果可能會(huì)干擾系統(tǒng)中斷，可能會(huì)發(fā)出錯(cuò)誤或非法轉(zhuǎn)移的各種制度之前停止過(guò)，使整個(gè)系統(tǒng)產(chǎn)生死亡率的錯(cuò)誤。因此，只有保證它是還不夠的單芯片電腦不會(huì)崩潰，研究如何減少風(fēng)險(xiǎn)的干擾，它可以自動(dòng)檢測(cè)錯(cuò)誤。這是它作為文字部分由兩個(gè)勘探這些努力，希望能發(fā)揮這些基本觀點(diǎn)鑄造一個(gè)拋磚引玉，幫助大家，也希望每一位同事共同探討一些功能，提高設(shè)計(jì)水平在一起。<

85、;/p><p>　　一、電力電子領(lǐng)域中，快速半導(dǎo)體的出現(xiàn)使高速度，高頻率的開(kāi)關(guān)切換成為了可能[1]。高速的開(kāi)關(guān)造成設(shè)備的重量和體積的減少，但與此同時(shí)這也造成了一些不利的影響，比如無(wú)線頻率的干擾[2]。生產(chǎn)商將生產(chǎn)的產(chǎn)品投放到市場(chǎng)，遵守電磁兼容性規(guī)章是必要的。在設(shè)計(jì)階段考慮電磁兼容性問(wèn)題是非常重要的[3]。在開(kāi)發(fā)產(chǎn)品前，建模和仿真是分析電磁兼容性最有效的工具。許多以前的研究都有涉及到電力電子元件的低頻分析[4~5]。不

86、同類型的電力電子轉(zhuǎn)換器都能夠被用來(lái)當(dāng)做電磁的干擾源。電磁干擾源可以通過(guò)輻射和傳導(dǎo)兩種方式來(lái)傳播。線路阻抗穩(wěn)定網(wǎng)絡(luò)被用來(lái)測(cè)量和計(jì)算電磁干擾影響的程度[6]。線路阻抗穩(wěn)定網(wǎng)絡(luò)輸出的干擾頻譜被引為電磁兼容性的評(píng)估標(biāo)準(zhǔn)[7,~8]。國(guó)家或國(guó)際規(guī)章是電子設(shè)備電磁兼容性評(píng)估的一個(gè)參考的方面[7~8]。</p><p>　　二、來(lái)源，途徑和電磁干擾的受害者</p><p>　　雜亂的電壓或者電流被稱為干

87、擾，而它們的來(lái)源被稱為干擾源。本論文中的干擾源就是一個(gè)高速的開(kāi)關(guān)電源。干擾通過(guò)輻射的方式在干擾源周圍傳播或通過(guò)和常見(jiàn)的電纜或電線連接進(jìn)行傳導(dǎo)。在這項(xiàng)研究中只考慮傳導(dǎo)發(fā)射設(shè)備，如電腦，接收器，放大器，工業(yè)控制器等。這些被干擾源輻射的設(shè)備被稱為受害者。常見(jiàn)的元素，源頭接線，布線為噪聲以及干擾的傳導(dǎo)提供了途徑。電磁傳導(dǎo)干擾有差模和共模兩種干擾方法[9]。</p><p><b>　　A.差模傳導(dǎo)干擾</

88、b></p><p>　　這種模式就是將一個(gè)噪聲源的噪聲施加到一個(gè)測(cè)試電路的不同線路。它的電路如下圖1所示[9]。在圖1中也顯示了干擾源，路徑阻抗，差模電流以及負(fù)載阻抗。</p><p>　　圖1差模傳導(dǎo)干擾路徑</p><p><b>　　B.常見(jiàn)的干擾方式</b></p><p>　　共模噪聲或干擾可能出現(xiàn)在電

89、線或者電纜的連接點(diǎn)。負(fù)載和接地點(diǎn)的任意泄露都可以被認(rèn)為是電壓干擾源。圖2演示了共模干擾源在共模電流為Icm1和Icm2時(shí)相關(guān)的電流路徑[9]。電力電子轉(zhuǎn)換器可以被用來(lái)作為供應(yīng)網(wǎng)絡(luò)線路之間的噪音源。在這項(xiàng)研究中不同的傳導(dǎo)干擾模式是非常重要的，所以討論只會(huì)在這種模式下被繼續(xù)考慮。</p><p><b>　　三、電磁兼容性規(guī)章</b></p><p>　　電子設(shè)備的應(yīng)用，

90、特別是那些擁有靜態(tài)電力電子轉(zhuǎn)換器的電子設(shè)備越來(lái)越多。就像前面講的一樣，電力電子轉(zhuǎn)換器被視為一個(gè)重要的電磁干擾源，并能使電網(wǎng)產(chǎn)生腐壞。各種各樣的干擾造成的高污染降低了電網(wǎng)電能的質(zhì)量。另一方面，一些住宅，廣告，特別是醫(yī)療器件對(duì)電力系統(tǒng)的電壓及頻率變化的干擾非常敏感。最好的解決干擾和提高電能質(zhì)量的方法就是遵守國(guó)家或國(guó)際電磁兼容性規(guī)定。國(guó)際無(wú)線電干擾特別委員會(huì)，國(guó)際電工委員會(huì)標(biāo)準(zhǔn)，美國(guó)聯(lián)邦通訊委員會(huì)和德國(guó)電氣工程師協(xié)會(huì)認(rèn)證是歐洲，美國(guó)，德國(guó)最有

91、名的決策并且出版最重要電磁兼容性法規(guī)的組織。IEC和VDE在傳導(dǎo)發(fā)射上的需要和限制如圖 3 和圖 4所示[7,9]。</p><p>　　圖2共模傳導(dǎo)干擾路徑</p><p>　　圖3 IEC管理排放標(biāo)準(zhǔn)</p><p>　　不同的消費(fèi)者群體可以遵守不同類別的規(guī)定。A類為普通的消費(fèi)者，B類為具有更苛刻限制的消費(fèi)者，在圖 3 和圖 4這兩者被分開(kāi)。IEC和VDE頻率范

92、圍不同，前者范圍為150 千赫茲 到 30 兆赫茲，后者的范圍為10 千赫茲 到 30 兆赫茲，在上述法規(guī)規(guī)定要求的頻率范圍內(nèi)，法規(guī)的遵守情況被用來(lái)測(cè)量或者計(jì)算傳導(dǎo)干擾的水平。在歐美社會(huì)電磁兼容性法規(guī)的遵行是強(qiáng)制的，產(chǎn)品必須要有認(rèn)證的標(biāo)簽以表示達(dá)到法規(guī)的要求[8]。</p><p>　　圖4 VDE管理排放標(biāo)準(zhǔn)</p><p>　　四、電磁傳導(dǎo)干擾測(cè)試</p><p&g

93、t;　　A. 線路阻抗穩(wěn)定網(wǎng)絡(luò)（LISN）</p><p>　　線路阻抗穩(wěn)定網(wǎng)絡(luò)是提供一個(gè)標(biāo)準(zhǔn)的工業(yè)元素被放置在供應(yīng)和電力電子轉(zhuǎn)換器之間， 包括加載一個(gè)接口以便可以對(duì)傳導(dǎo)干擾進(jìn)行測(cè)量[7]，所述的情況如圖5 所示[6]。線路阻抗穩(wěn)定網(wǎng)絡(luò)應(yīng)具有以下幾個(gè)特點(diǎn)，以滿足測(cè)量條件[7]。</p><p>　　提供一個(gè)低阻抗路徑轉(zhuǎn)移源動(dòng)力到電力電子轉(zhuǎn)換器以及負(fù)載。</p><p&g

94、t;　　干擾源提供一個(gè)低阻抗路徑，電力電子轉(zhuǎn)換器用來(lái)測(cè)量路徑端口。</p><p>　　圖5 LISN網(wǎng)絡(luò)布局測(cè)量傳導(dǎo)干擾</p><p>　　B. 線路阻抗穩(wěn)定網(wǎng)絡(luò)拓?fù)?lt;/p><p>　　線路阻抗穩(wěn)定網(wǎng)絡(luò)比較常見(jiàn)的拓?fù)浣Y(jié)構(gòu)如圖6所示[7]。</p><p>　　圖6 LISN網(wǎng)絡(luò)常見(jiàn)的拓?fù)浣Y(jié)構(gòu)</p><p>　　

95、上圖給出了線路阻抗穩(wěn)定網(wǎng)絡(luò)的阻抗與頻率的變化以及前面提到的拓?fù)浣Y(jié)構(gòu)。線性阻抗穩(wěn)定網(wǎng)絡(luò)在電磁干擾測(cè)量范圍之內(nèi)擁有穩(wěn)定的阻抗[7]。</p><p>　　線路阻抗穩(wěn)定網(wǎng)絡(luò)輸出的信號(hào)電平與頻率的變化就是干擾頻譜。一個(gè)系統(tǒng)的電磁兼容性可以通過(guò)比較它的干擾頻譜和標(biāo)準(zhǔn)的限制來(lái)進(jìn)行評(píng)估。線路阻抗穩(wěn)定網(wǎng)絡(luò)輸出的信號(hào)電平范圍在10千赫茲到30千赫茲,或者150千赫茲到30兆赫茲之間，這就是標(biāo)準(zhǔn)的電磁兼容性，并且它處在標(biāo)準(zhǔn)的限定范圍