單片機(jī)外文翻譯

1、<p>　　附錄四 外文資料翻譯</p><p>　　A microcontroller (or MCU) is a computer-on-a-chip. It is a type of microprocessor emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose micropr

2、ocessor (the kind used in a PC). The majority of computer systems in use today are embedded in other machinery, such as telephones, clocks, appliances, vehicles, and infrastructure. An embedded system usually has mi

3、nimal requirements for memory and program length and may require simple but unusual input/output systems</p><p>　　Integrating the memory and other peripherals on a single chip and testing them as a unit incr

4、eases the cost of that chip, but often results in decreased net cost of the embedded system as a whole. (Even if the cost of a CPU that has integrated peripherals is slightly more than the cost of a CPU + external periph

5、erals, having fewer chips typically allows a smaller and cheaper circuit board, and reduces the labor required to assemble and test the circuit board). This trend leads to design. </p><p>　　A microcontroller

6、 is a single integrated circuit, commonly with the following features: central processing unit - ranging from small and simple 4-bit processors to sophisticated 32- or 64-bit processors input/output interfaces such as se

7、rial ports (UARTs) other serial communications interfaces like I²C, Serial Peripheral Interface and Controller Area Network for system interconnect peripherals such as timers and watchdog RAM for data storage ROM,

8、EPROM, EEPROM or Flash memory for program storag</p><p>　　Higher performance with the 80C51：Specifically targeted at high-end 8-bit microprocessor applications requiring low power consumption, the 80C51 has

9、all of the 8051's architectural features, including its enhanced CPU and I/O functions. The on-chip program memory size remains 4 Kbytes, with a full 64-kbyte external range. The 128byte on-chip RAM also is externall

10、y expandable to 64kbytes. Also , on board are two 16-bit time counters , a full duplex serial port, and a 1-bit Boolean processor for c</p><p>　　The AT89S2 is a low-power, high-performance CMOS 8-bit microco

11、mputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 in

12、struction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip,&l

13、t;/p><p>　　The AT89S52 provides the following standard features:8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a six vector two-level interrupt architecture, a full duplex serial

14、 port, on-chip oscillator and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the

15、CPU while allowing the RAM, timer/counters, serial port and interrupt system to c</p><p>　　Pin Description</p><p>　　VCC：Supply voltage.</p><p>　　GND：Ground.</p><p>　　Po

16、rt 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be confi

17、gured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the

18、 code bytes during programverification. External pullups a</p><p>　　Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s

19、are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port

20、 1 also receives the low-order address bytes during Flash programming and verification.</p><p>　　Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/so

21、urce four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of t

22、he internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addre</p><p>　　Port 3: Port 3 is an 8-bit

23、bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. </p>

24、;<p>　　RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.</p><p>　　ALE/PROG: Address Latch Enable output pulse for latching the low byte of

25、the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be u

26、sed for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR locati</p>&

27、lt;p>　　PSEN: Program Store Enable is the read strobe to external program memory.When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activat

28、ions are skipped during each access to external data memory.</p><p>　　EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locat

29、ions starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt

30、programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.</p><p>　　XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit.<

31、/p><p>　　XTAL2: Output from the inverting oscillator amplifier.</p><p>　　單片機(jī)即單片微型計算機(jī)，是把中央處理器、存儲器、定時/計數(shù)器、輸入輸出接口都集成在一塊集成電路芯片上的微型計算機(jī)。與應(yīng)用在個人電腦中的通用型微處理器相比，它更強(qiáng)調(diào)自供應(yīng)（不用外接硬件）和節(jié)約成本。它的最大優(yōu)點(diǎn)是體積小，可放在儀表內(nèi)部，但存儲量小，輸

32、入輸出接口簡單，功能較低。由于其發(fā)展非常迅速，舊的單片機(jī)的定義已不能滿足，所以在很多應(yīng)用場合被稱為范圍更廣的微控制器，但是目前在中國大陸仍多沿用“單片機(jī)”的稱呼。 絕大多數(shù)現(xiàn)在的單片機(jī)都是基于馮·諾伊曼結(jié)構(gòu)的，這種結(jié)構(gòu)清楚地定義了嵌入式系統(tǒng)所必需的四個基本部分：一個中央處理器核心，程序存儲器（只讀存儲器或者閃存）、數(shù)據(jù)存儲器（隨機(jī)存儲器），一個或者更多的定時/計時器，還有用來與外圍設(shè)備以及擴(kuò)展資源進(jìn)行通信的輸入/輸出

33、端口——所有這些都被集成在單個集成電路芯片上。說單片機(jī)與通用型中央處理單元芯片不同是因為前者一般很容易配合最小型的外部支持芯片制成工作計算機(jī)。這樣就可以很容易的把單片機(jī)系統(tǒng)植入裝置內(nèi)部來控制裝置了。近年來為了在指令和數(shù)據(jù)上使用不同的字寬，并提高處理器流水線速度，哈佛結(jié)構(gòu)在微控制器和DSP也逐漸得到了廣泛的應(yīng)用。 </p><p>　　89S52的高性能,特別是定位于需要低能耗的高端8位微處理器，它有增強(qiáng)的

34、CPU和輸入輸出功能。芯片上存貯器大小為4K字節(jié)，可擴(kuò)展至64K字節(jié)。板子上還有兩個16位的時間計數(shù)器、一個全雙工的串口、一個用于控制的布爾處理器. </p><p>　　在電氣性能上80s52電壓范圍4到6伏，4.5-5.5伏間與TTL兼容， 4.5伏以上，芯片工作在15MHZ以上.80s52位低能量散熱提供了空閑模式，這種模式在一個新的叫做PCON的寄存器上設(shè)置一個比特位就可以初始化，PCON寄存器放在之前沒

35、使用的芯片區(qū)域。當(dāng)該比特置位的時候，CPU停止工作，時間計數(shù)器中斷，串口繼續(xù)正常工作。復(fù)位或任何中斷都將結(jié)束空閑模式。 如果中斷結(jié)束了空閑模式，所有寄存器數(shù)據(jù)都保持不變，為中斷服務(wù)?？臻e模式把芯片上的時鐘分成兩路信號，一個給CPU，一個用于激活的空閑電路。使用該技術(shù)空閑模式下的電流為1mA（電壓6V，操作頻率15MHZ） PCON寄存器其他比特位可以設(shè)置成標(biāo)志位，決定一個中斷是否可以正常使用或是否可以中斷空閑模式。這

36、些標(biāo)志位可以使中斷有雙重作用，而不是只在這種模式下起作用。</p><p>　　AT89S52是一個低電壓，高性能CMOS8位單片機(jī)帶有8K字節(jié)的可反復(fù)擦寫的程序存儲器（PENROM）。和256字節(jié)的存取數(shù)據(jù)存儲器（RAM），這種器件采用ATMEL公司的高密度、不容易丟失存儲技術(shù)生產(chǎn)，并且能夠與MCS-51系列的單片機(jī)兼容。片內(nèi)含有8位中央處理器和閃爍存儲單元，有較強(qiáng)的功能的AT89S52單片機(jī)能夠被應(yīng)用到控制領(lǐng)

37、域中。</p><p>　　AT89S52提供以下的功能標(biāo)準(zhǔn)：8K字節(jié)閃爍存儲器，256字節(jié)隨機(jī)存取數(shù)據(jù)存儲器，32個I/O口，2個16位定時/計數(shù)器，1個6向量兩級中斷結(jié)構(gòu)，1個串行通信口，片內(nèi)震蕩器和時鐘電路。另外，AT89S52還可以進(jìn)行0HZ的靜態(tài)邏輯操作，并支持兩種軟件的節(jié)電模式。閑散方式停止中央處理器的工作，能夠允許隨機(jī)存取數(shù)據(jù)存儲器、定時/計數(shù)器、串行通信口及中斷系統(tǒng)繼續(xù)工作。掉電方式保存隨機(jī)存取數(shù)

38、據(jù)存儲器中的內(nèi)容，但震蕩器停止工作并禁止其它所有部件的工作直到下一個復(fù)位。</p><p><b>　　引腳描述</b></p><p><b>　　VCC：電源電壓</b></p><p><b>　　GND：地</b></p><p>　　P0口：P0口是一組8位漏極開路雙

39、向I/O口，即地址/數(shù)據(jù)總線復(fù)用口。作為輸出口時，每一個管腳都能夠驅(qū)動8個TTL電路。當(dāng)“1”被寫入P0口時，每個管腳都能夠作為高阻抗輸入端。P0口還能夠在訪問外部數(shù)據(jù)存儲器或程序存儲器時，轉(zhuǎn)換地址和數(shù)據(jù)總線復(fù)用，并在這時激活內(nèi)部的上拉電阻。P0口在閃爍編程時，P0口接收指令，在程序校驗時，輸出指令，需要接電阻。</p><p>　　P1口：P1口一個帶內(nèi)部上拉電阻的8位雙向I/O口，P1的輸出緩沖級可驅(qū)動4個T

40、TL電路。對端口寫“1”，通過內(nèi)部的電阻把端口拉到高電平，此時可作為輸入口。因為內(nèi)部有電阻，某個引腳被外部信號拉低時輸出一個電流。閃爍編程時和程序校驗時，P1口接收低8位地址。</p><p>　　P2口：P2口是一個內(nèi)部帶有上拉電阻的8位雙向I/O口，P2的輸出緩沖級可驅(qū)動4個TTL電路。對端口寫“1”，通過內(nèi)部的電阻把端口拉到高電平，此時，可作為輸入口。因為內(nèi)部有電阻，某個引腳被外部信號拉低時會輸出一個電流。

41、在訪問外部程序存儲器或16位地址的外部數(shù)據(jù)存儲器時，P2口送出高8位地址數(shù)據(jù)。在訪問8位地址的外部數(shù)據(jù)存儲器時，P2口線上的內(nèi)容在整個運(yùn)行期間不變。閃爍編程或校驗時，P2口接收高位地址和其它控制信號。</p><p>　　P3口：P3口是一組帶有內(nèi)部電阻的8位雙向I/O口，P3口輸出緩沖故可驅(qū)動4個TTL電路。對P3口寫如“1”時，它們被內(nèi)部電阻拉到高電平并可作為輸入端時，被外部拉低的P3口將用電阻輸出電流。&l

42、t;/p><p>　　RST：復(fù)位輸入。當(dāng)震蕩器工作時，RET引腳出現(xiàn)兩個機(jī)器周期以上的高電平將使單片機(jī)復(fù)位。</p><p>　　ALE/：當(dāng)訪問外部程序存儲器或數(shù)據(jù)存儲器時，ALE輸出脈沖用于鎖存地址的低8位字節(jié)。即使不訪問外部存儲器，ALE以時鐘震蕩頻率的1/16輸出固定的正脈沖信號，因此它可對輸出時鐘或用于定時目的。要注意的是：每當(dāng)訪問外部數(shù)據(jù)存儲器時將跳過一個ALE脈沖時，閃爍存儲器

43、編程時，這個引腳還用于輸入編程脈沖。如果必要，可對特殊寄存器區(qū)中的8EH單元的D0位置禁止ALE操作。這個位置后只有一條MOVX和MOVC指令A(yù)LE才會被應(yīng)用。此外，這個引腳會微弱拉高，單片機(jī)執(zhí)行外部程序時，應(yīng)設(shè)置ALE無效。</p><p>　　PSEN：程序儲存允許輸出是外部程序存儲器的讀選通信號，當(dāng)AT89C51由外部程序存儲器讀取指令時，每個機(jī)器周期兩次PSEN 有效，即輸出兩個脈沖。在此期間，當(dāng)訪問外部

44、數(shù)據(jù)存儲器時，這兩次有效的PSEN 信號不出現(xiàn)。</p><p>　　EA/VPP：外部訪問允許。欲使中央處理器僅訪問外部程序存儲器，EA端必須保持低電平。需要注意的是：如果加密位LBI被編程，復(fù)位時內(nèi)部會鎖存EA端狀態(tài)。如EA端為高電平，CPU則執(zhí)行內(nèi)部程序存儲器中的指令。閃爍存儲器編程時，該引腳加上+12V的編程允許電壓VPP，當(dāng)然這必須是該器件是使用12V編程電壓VPP。</p><p&