頻率計(jì)vhdl程序和仿真

1、頻率計(jì)VHDL程序和仿真17數(shù)字頻率計(jì)數(shù)字頻率計(jì)VHDLVHDL程序與仿真程序與仿真一、功能：頻率計(jì)。具有4位顯示，能自動(dòng)根據(jù)7位十進(jìn)制計(jì)數(shù)的結(jié)果，自動(dòng)選擇有效數(shù)據(jù)的高4位進(jìn)行動(dòng)態(tài)顯示。小數(shù)點(diǎn)表示是千位，即KHz。二、源程序及各模塊和主要語句的功能libraryieeeuseieee.std_logic_1164.alluseieee.std_logic_unsigned.allentitypljispt(start:instd_log

2、ic復(fù)位信號(hào)clk:instd_logic系統(tǒng)時(shí)鐘clk1:instd_logic被測(cè)信號(hào)yy1:outstd_logic_vect(7downto0)八段碼w1:outstd_logic_vect(3downto0))數(shù)碼管位選信號(hào)endpljarchitecturebehavofPLjissignalb1b2b3b4b5b6b7:std_logic_vect(3downto0)十進(jìn)制計(jì)數(shù)器signalbcd:std_logic_ve

3、ct(3downto0)BCD碼寄存器signalq:integerrange0to49999999秒分頻系數(shù)signalqq:integerrange0to499999動(dòng)態(tài)掃描分頻系數(shù)signalenbclk:std_logic使能信號(hào)，有效被測(cè)信號(hào)signalsss:std_logic_vect(3downto0)小數(shù)點(diǎn)signalbcd0bcd1bcd2bcd3:std_logic_vect(3downto0)寄存7位十位計(jì)數(shù)器中