1.5bit級pipelinedadc典型單級電路結(jié)構(gòu)實現(xiàn)研究

1、電子科技大學(xué)碩士學(xué)位論文1.5Bit級pipelinedADC典型單級電路結(jié)構(gòu)實現(xiàn)研究姓名：石艷梅申請學(xué)位級別：碩士專業(yè)：微電子與固體電子學(xué)指導(dǎo)教師：楊謨?nèi)A20040101ABSTRACTWiththeexplosivedevelopmentofcommunicationsystemanddigitalsignalprocessingtechnologyananalogto—digitalconverteLasainterfacebet

2、weenanalogsignalanddigitalsignal，isnecessaryPipelineADChasanexcellentcombinationofhighconverterrateandhighconverterprecisionAtthesametime，ithasagoodtradeoffbetweenspeedanddissipation，SOItiswidelyusedA33Msample／s15bit／sta

3、gelObitpipelineADCisdesignedandanalyzedinthispaperInthispapertheperformanceofseveralclassicalA／DconverterswithdifferentarchitectureisanalyzedandcomparedPipelineADCisselectedforitsbetterperformance。Byanalyzingthetradeoffb

4、etweenthespeedmiddissipation，15bit／stagepipelineADCisadoptedThesystemstructureisimprovedbasedonthetraditional15bit／stagepipelineADCThefirst9stagesadoptthesamestructureatterbeingimproved，whichmakesthedesignmodularizedThet

5、enthstagejustneedasimplecomparatorwhichearlcorrecttheninthstageTheimprovedsystemdecreasesthedifficultyindesigningandsavesmoredesigningtimeAfewsystemerrorsthataregainerrorsubADCerrorandsubDACerroretcaresimulatedandanalyze

6、dInthispaperthesourcesoftheseerrorsareanalyzedandtheseerrorsaresimulatedintheMatlab／simulinkenvironmentFromthesimulationresult，wecanknowtheinfluencefromtheellorstothesystemperfomaanceTwoerrorcorrectiontechnologies，whicha

7、regainerrorcorrectiontechnologyandcomparatorerrorcorrectiontechnologyarebroughtforthandappliedinthe15bit／stagepipelineADCMeantime，theyaresimulatedintheMatlab／simulinkenvironmentandtheresultofsimulationshowsthatthetwocorr