電氣類畢業(yè)設計外文翻譯3

1、<p><b>　　附錄1 譯文</b></p><p>　　A/D 轉換器按照轉換原理可分為直接A/D 轉換器和間接A/D 轉換器。所謂直接A/D 轉換器，是把 模擬信號直接轉換成數(shù)字信號，如逐次逼近型，并聯(lián)比較型等。其中逐次逼近型A/D 轉換器，易于用集成工藝實現(xiàn)，且能達到較高的分辨率和速度，故目前集成化A/D 芯片采用逐次逼近型者多；間接A/D 轉換器是先把模擬量轉換成中間量

2、，然后再轉換成數(shù)字量，如電壓/時間轉換型（積分型），電壓/頻率轉換型，電壓/脈寬轉換型等。 其中積分型A/D 轉換器電路簡單，抗干擾能力強，切能作到高分辨率，但轉換速度較慢。 有些轉換器還將多路開關、基準電壓源、時鐘電路、譯碼器和轉換電路集成在一個芯片內(nèi)，已超出了單純A/D 轉換功能，使用十分方便。</p><p>　　ADC 經(jīng)常用于通訊、數(shù)字相機、儀器和測量以及計算機系統(tǒng)中，可方便數(shù)字訊號處理和信息的儲存。大

3、多數(shù)情況下，ADC 的功能會與數(shù)字電路整合在同一芯片上，但部份設備仍需使用獨立的ADC。行動電話是數(shù)字芯片中整合ADC 功能的例子，而具有更高要求的蜂巢式基地臺則需依賴獨立的ADC 以提供最佳性能。</p><p>　　ICL7107是三位半雙積分型A/D轉換器，屬于CMOS大規(guī)模集成電路，它的最大顯示值為士1999，最小分辨率為100μV。能直接驅動共陽極LED數(shù)碼管，不需要另加驅動器件，采用士5V兩組電源供電

4、，在芯片內(nèi)部從與COM之間有一個穩(wěn)定性很高的2.8V基準電源，通過電阻分壓器可獲得所需的基準電壓。能通過內(nèi)部的模擬開關實現(xiàn)自動調(diào)零和自動極性顯示功能，輸入阻抗高，對輸入信號無衰減作用。整機組裝方便，無需外加有源器件，配上電阻、電容和LED共陽極數(shù)碼管，就能構成一只直流數(shù)字電壓表頭。噪音低，溫漂小，具有良好的可靠性，壽命長。芯片本身功耗小于15mv(不包括LED)，不設有專門的小數(shù)點驅動信號。使用時可將LED共陽極數(shù)數(shù)碼管公共陽極接，可以

5、方便的進行功能檢查。</p><p>　　雙積分型A/D轉換器內(nèi)部包括積分器、比較器、計數(shù)器，控制邏輯和時鐘信號源。積分器是A/D轉換器的心臟，在一個測量周期內(nèi)，積分器先后對輸入信號電壓和基準電壓進行兩次積分。比較器將積分器的輸出信號與零電平進行比較，比較的結果作為數(shù)字電路的控制信號。時鐘信號計數(shù)器對反向積分過程的時鐘脈沖進行計數(shù)?？刂七壿嫲ǚ诸l器、譯碼器、相位驅動器、控制器和鎖存器。分頻器用來對時鐘脈沖逐漸分

6、頻，得到所需的計數(shù)脈沖和共陽極LED數(shù)碼管公共電極所需的方波信號。譯碼器為BCD七段譯碼器，將計數(shù)器的BCD碼譯成LED數(shù)碼管七段筆畫組成數(shù)字的相應編碼。驅動器是將譯碼器輸出對應于共陽極數(shù)碼管七段筆畫的邏輯電平變成驅動相應筆畫的方波?？刂破鞯淖饔糜腥齻€：第一，識別積分器的工作狀態(tài)，適時發(fā)出控制信號，使各模擬開關接通或斷開，A/D轉換器能循環(huán)進行。第二，識別輸入電壓極性，控制LED數(shù)碼管的負號顯示。第二，當輸入電壓超量限時發(fā)出溢出信號，使

7、符號位顯示“1”，其余碼全部熄滅。調(diào)鎖存器用來存放A/D轉換的結果，鎖存器的輸出經(jīng)譯碼器后驅動LED 。</p><p>　　雙積分模數(shù)轉換器ICL7107的工作原理：當輸入電壓一定時，在一定時間內(nèi)對電量為零的電容器進行恒流（電流大小與待測電壓成正比）充電，這樣電容器兩極之間的電量將隨時間線性增加，當充電到一定時間后，電容器上積累的電量與被測電壓成正比。然后讓電容器恒流放電（電流大小與參考電壓成正比），這樣電容器

8、兩極之間的電量將線性減小，直到T2時刻減小為零。所以，可以得出T2也與Vx成正比。如果用計數(shù)器在T2開始時刻對時鐘脈沖進行計數(shù)，結束時刻停止計數(shù)，得到計數(shù)值N2，則N2與Vx成正比。雙積分式AD轉換器的工作原理就是基于上述電容器充放電過程中計數(shù)器讀數(shù)N2與輸入電壓Vx成正比構成的。</p><p>　　ICL7107雙積分式A/D轉換器的基本組成如圖1-1所示。</p><p>　　圖1-

9、1 ICL7107內(nèi)部結構圖</p><p>　　ICL7107內(nèi)部由積分器、過零比較器、邏輯控制電路、閘門電路、計數(shù)器、時鐘脈沖源、鎖存器、譯碼器及顯示等電路所組成。它的轉換電路大致分為三個階段：</p><p>　　第一階段，首先電壓輸入腳與輸入電壓斷開而與地端相連放掉電容器C上積累的電量，然后參考電容充電到參考電壓值，同時反饋環(huán)給自動調(diào)零電容CAZ以補償緩沖放大器、積分器和比較器的偏

10、置電壓。這個階段稱為自動校零階段。</p><p>　　第二階段為信號積分階段（采樣階段），在此階段Vs接到Vx上使之與積分器相連，這樣電容器C將被以恒定電流充電，與此同時計數(shù)器開始計數(shù)，對于三位半模數(shù)轉換器，當計到某一特定值（N1=1000）時充電過程結束，這樣采樣時間T1是恒定的，假設時鐘脈沖為TCP，則T1的計算見公式（1-1）：</p><p>　　T1=N1×TCP

11、 （1-1）</p><p>　　在此階段，Vo與Vx極性相反，Qo為T1時間內(nèi)恒流給電容器C充電得到的電量，Qo和Vo的計算見公式（1-1）和（1-2）：</p><p>　　Qo == （1-2）</p><p>　　Vo = -= -

12、 （1-3）</p><p>　　第三階段為反積分階段（測量階段），在此階段，邏輯控制電路把已經(jīng)充電至的參考電容按與極性相反的方式經(jīng)緩沖器接到積分電路，這樣電容C將以恒定的電流放電，與此同時計數(shù)器開始計數(shù)，電容器C上的電量線性減小，當經(jīng)過時間T2后，電容器電壓減小到0，由零值比較器輸出閘門控制信號再停止計數(shù)器計數(shù)并顯示出計數(shù)結果。此階段關系見公式（1-4）：</p&

13、gt;<p>　　Vo+=0 （1-4）</p><p>　　把式（1-3）代入式（1-4）,所得結果見式（1-5）：</p><p>　　T2=×Vx （1-5） 從式（1-5）可以看出，由于T1和均為常數(shù)，

14、所以T2與Vx成正比，從圖1-1可以看出。若時鐘最小脈沖單元為,則T1和T2的計算見公式（1-6）和（1-7）：</p><p><b>　?。?-6）</b></p><p><b>　?。?-7）</b></p><p>　　代入式（1-5），即有式（1-8）：</p><p>　　N2=

15、15;Vx （1-8）</p><p>　　可以得出測量的計數(shù)值N2與被測電壓Vx成正比。</p><p>　　雙積分型A/D轉換器ICL7107是一種間接A/D轉換器。它通過對輸入模擬電壓和參考電壓分別進行兩次積分，將輸入電壓平均值變換成與之成正比的時間間隔，然后利用脈沖時間間隔，進而得出相應的數(shù)字性輸出。對于ICL7107，信號積分階

16、段時間固定為1000個,即N1的值為1000不變。而N2的計數(shù)隨Vx的變化范圍為0～1999，同時自動校零的計數(shù)范圍為2999～1000，也就是測量周期總保持在4000個不變。即滿量程時N2最大值見式（1-9）：</p><p>　　= 2×N1= 2000 （1-9）</p><p>　　Vx最大值見式（1-10）：</p>&l

17、t;p>　　= 2× （1-10）</p><p>　　這樣若取參考電壓為100mV，則最大輸入電壓為200mV；若參考電壓為1V，則最大輸入電壓為2V。</p><p>　　圖1-2 ICL7107內(nèi)部電壓變化圖</p><p>　　附錄2 英文參考資料</p><p>　　A / D c

18、onverter can be divided in accordance with the principle of direct conversion A / D converter and indirect A / D converter. The so-called direct A / D converter, is to directly convert analog signals into digital signals

19、, such as successive approximation, parallel comparison type. Which successive approximation A / D converter, easy to use integrated process to achieve and can achieve higher resolution and speed, so the current integrat

20、ed A / D chip successive approximation are many; indi</p><p>　　ADC often used for communications, digital cameras, equipment and measurement and computer systems, digital signal processing can be easily and

21、information storage. In most cases, ADC will feature integration with digital circuits on the same chip, but part of the equipment needed to use a separate ADC. Mobile phone is a digital chip integrated ADC features exam

22、ples and a more demanding cellular base station independent of the ADC need to rely on to provide the best performance.</p><p>　　ICL7107 is one of three semi-double integral type A / D converter, are CMOS LS

23、I, the largest show of its 1999 value of persons, the minimum resolution of 100μV. Can directly drive common anode LED digital tube, the device does not require additional drivers, two 5V power supply with disabilities,

24、and the COM in the chip from a high stability between the 2.8V reference supply through a resistor divider obtain the necessary reference voltage. Through the analog switch inside the automatic zero adj</p><p&

25、gt;　　Double integral type A / D converter includes an internal integrator, comparator, counter, control logic and clock signal source. Integrator is the A / D converter in the heart of a measurement cycle, the integrator

26、 has the input signal voltage and reference voltage for two points. Comparator to the integrator output signal compared with the zero level to compare the results of the control signal as a digital circuit. Clock signal

27、on the reverse integration process of counter clock pulse count. </p><p>　　Double integral ADC ICL7107 works: When the input voltage is constant, within a certain time, the capacitor charge is zero constant

28、current (current and sensed voltage is proportional to the size of) charge, so that the capacitor between the power poles will be increases linearly with time, when the charge to a certain time, the accumulation of charg

29、e on the capacitor and the measured voltage. Then let the capacitor discharge current (current is proportional to the size of the reference voltage)</p><p>　　ICL7107 internally by the integrator, zero crossi

30、ng comparator, logic control circuits, gate circuits, counters, clock source, latch, decoder and display circuit. Its conversion circuit can be divided into three stages:</p><p>　　The first stage, the first

31、voltage input pin and disconnect the input voltage is connected with the land-side let go of the power accumulated in capacitor C, and then refer to the reference voltage capacitor charging, while the feedback loop to th

32、e auto-zero capacitor CAZ to compensate for the buffer amplifier, Integrator and comparator offset voltage. This phase is called auto-zero phase.</p><p>　　The second stage is the signal integration phase (sa

33、mpling phase), at this stage on the Vs Vx received so connected with the integrator, so that the capacitor C is a constant current charge, while the counter starts counting module for the three and a half Converter to a

34、specific value when the count (N1 = 1000) when the charging process is complete, so that T1 is a constant sampling time, assuming the clock pulse as TCP, then see the formula for the calculation of T1 （1-1）:</p>&

35、lt;p>　　T1=N1×TCP （1-1）</p><p>　　At this stage, Vo and Vx opposite polarity, Qo for the T1 time constant for charging the capacitor C are the power, Qo and Vo calc

36、ulation see formula （1-1） and （1-2）:</p><p>　　Qo == （1-2）</p><p>　　Vo = -= - （1-3）</p><p>　　The third phase of the anti-integration

37、 phase (measuring time), at this stage, the logic control circuit to the reference capacitor has been charged to opposite polarity by the way and the buffer received by the integrator, so that a constant current of capac

38、itor C will discharge At the same time counter starts counting the charge on the capacitor C decreases linearly, when the elapsed time T2, the capacitor voltage is reduced to 0, the zero value of the comparator output ga

39、te control signal and</p><p>　　Vo+=0 （1-4）</p><p>　　Skill (1-3) into (1-4), the results see the formula (1-5):</p><p>　　T2=×Vx （1

40、-5） </p><p>　　From (1-5) can be seen, the T1 and are constants, so the T2 and Vx is proportional, can be seen from Figure 1-1. If the clock pulse unit is the smallest, then the calculation of T1 and T2,

41、see equation (1-6) and (1-7):</p><p><b>　?。?-6）</b></p><p><b>　?。?-7）</b></p><p>　　Into (1-5), that is, equation (1-8):</p><p>　　N2=×Vx

42、 （1-8）</p><p>　　Count measure can be drawn with the measured voltage Vx is proportional to N2.</p><p>　　Double integral type A / D converter is an indirect ICL7107 A / D co

43、nverter. It is through the input analog voltage and reference voltage for two points, respectively, will be converted into associated input voltage proportional to the average time interval, and pulse interval, and then

44、draw the corresponding number of outputs. For the ICL7107, the signal integration period of time is fixed at 1000, that is, the same N1 value is 1000. The count of N2 change with the Vx range of 0 to 1999, while </p&g

45、t;<p>　　= 2×N1= 2000 （1-9）</p><p>　　Vx max see Eq (1-10):</p><p>　　= 2× （1-10）</p><p>　　So if we take the reference voltage is